User guide

Arch Meter Corporation PS1000 Ver1.2
PS1000Rev. 1.2 May 2006
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www.archmeter.com
3. Clock Setting
The operation frequency of some PS1000 internal function blocks, like the ADC,
MCU, DSP and LCD can be adjusted depends on operation condition. It can be
configured with some internal register. The next section will describe how to program
these registers. When change these registers setting, please make sure that is matched
with the system requirement.
3.1 MCU Clock Setting
The PS1000 can set the different MCU operation clock during the different
operation condition. It also can help to save the power.
MCUCFG (0xFE29)
B7 B6 B5 B4 B3 B2 B1 B0
PORTCFG DSPTM[1:0] DSPROM MCUDIV[3:0]
PORTCFG
0: P0/P2 normal operation
1: P0/P2 mapped to the P4/P5
DSPTM [1:0]
00: DSP normal operation
01: DSP Test Mode 1 (reserved)
10: DSP Test Mode 2 (reserved)
11: DSP Test Mode 3 (reserved)
DSPROM:
0: DSP Normal operation
1: Mapping DSPROM to the I/O memory space (0xF000 ~ 0xF3FF, 1KB)
MCUDIV: MCU clock Divider
MCUDIV[3:0] 22MHz 24MHz
0000 SCLK / 1 22.00 24.00
0001 SCLK / 2 11.00 12.00
0010 SCLK / 3 7.33 8.00
0011 SCLK / 4 5.50 6.00