User guide

Arch Meter Corporation PS1000 Ver1.2
PS1000Rev. 1.2 May 2006
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13. Interrupt
The PS1000 has 8 extended interrupt input source for the SPI, I2C, SSP and I/O
interface. The extended interrupt block diagram is shown as figure 2.
The extended interrupt control can be controlled by the 4 interrupt control
registers which are map to the SFR. That is IMR/ICR/IPR/IRR. Each bit of
IMR/IPR/ICR/IRR is mapped to an interrupt source. The mapping table is as
follow.
IMR(SFR 0xF8)
B7 B6 B5 B4 B3 B2 B1 B0
SPI_INT I2C_INT TXINT RXINT TIin_2 RIin_2 ExInt1 Exint0
If the relative bit is set as 1, the interrupt will enable. Otherwise, the interrupt
will disable. For each interrupt source, it can be level trigger or edge trigger. It is
controlled by the ICR register. When the bit is set as 1, the relative interrupt source
will be LEVEL trigger; otherwise, it will be EDGE trigger.
For each interrupt source, it also can set as high level or low level (rising edge
or falling edge) trigger. It is controlled by the IPR. When the IPR is set as 1, the
relative interrupt source is set as HIGH level (RISING edge) trigger, otherwise, it
will set as LOW level (FALLING edge) trigger.
Whenever the interrupt is input, if the relative IMR is enabled, the IRR will
be set as ‘1’, it indicates the relative interrupt is inputted and switch the MCU
program to the Interrupt Service Routine (ISR). The interrupt table is shown as
following table. The extended interrupt ISR must base on the IRR register to
decide what kind of task need to do and extended interrupt ISR also can decided
the priority for these 8 extended interrupt source by the ISR.
I
R
I
R
R
IMR
IPR/ICR
SPI_INT
I2C_INT
TXINT
RXINT
TIin_2
RIin_2
ExINT1
ExINT0
8051
Interrupt
Controller
INT0/INT
1
Serial Port 0/1
T/C 0/1/2
ISR Entry Point