User guide

Arch Meter Corporation PS1000 Ver1.2
PS1000Rev. 1.2 May 2006
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www.archmeter.com
the direction bit is 1 (R), it will enter Slave Transmitter Mode. After the address
and the direction bit have been received, the SI bit is set and a valid status code can
be read from the I
2
C Status Register (I2CSTAR).
S Slave Address P/RSA/~AAAW Data Data
"0" = Write
"1" = Read
Data Transfer
(n Bytes + Acknowledge)
A = Acknowledge (SDA low)
~A = Not Acknowledge (SDA high)
S = START Condition
P = STOP Condition
RS = Repeated START Condition
From Master to Slave
From Slave to Master
Format of slave receiver mode
9.2.4 Slave Transmitter Mode
The first byte is received and handled as in the Slave Receiver Mode.
However, in this mode, the direction bit will indicate that the transfer direction is
reversed. Serial data is transmitted via SDA while the serial clock is input through
SCL. START and STOP conditions are recognized as the beginning and end of a
serial transfer.
S Slave Address PA/~AAAR Data Data
"0" = Write
"1" = Read
Data Transfer
(n Bytes + Acknowledge)
A = Acknowledge (SDA low)
~A = Not Acknowledge (SDA high)
S = START Condition
P = STOP Condition
From Master to Slave
From Slave to Master
Format of slave transmitter mode
In a given application, I
2
C may operate as a master and as a slave. In the slave
mode, the I
2
C hardware looks for its own slave address and the general call
address. If one of these addresses is detected, an interrupt is requested. When the
micro controller wishes to become the bus master, the hardware waits until the bus
is free before the master mode is entered so that a possible slave action is not
interrupted. If bus arbitration is lost in the master mode, I
2
C switches to the slave
mode immediately and can detect its own slave address in the same serial transfer.