User guide

Arch Meter Corporation PS1000 Ver1.2

PS1000Rev. 1.2 May 2006

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condition is transmitted, the SI bit is set, and the status code in I

C Status Register

(I2CSTAR) should be 08h. This status code must be used to vector to an interrupt

service routine where the user should load the slave address and data direction bit

(SLA + W) to the I2C Data Register (I2CDATR). The I

C Status Register

(I2CSTAR) must be cleared by firmware, thus the SI bit is automatically cleared,

before the data transfer can continue.

When the slave address and R/W bit have been transmitted and an

acknowledgement bit has been received, the SI bit is set again. The appropriate

action to be taken for each status codes is shown in Status Codes Table.

S Slave Address PA/~AAAW Data Data

"0" = Write

"1" = Read

Data Transfer

(n Bytes + Acknowledge)

A = Acknowledge (SDA low)

~A = Not Acknowledge (SDA high)

S = START Condition

P = STOP Condition

From Master to Slave

From Slave to Master

Format of master transmitter mode

9.2.2 Master Receiver Mode

In the Master Receiver Mode, data is received from a slave transmitter. The

transfer started in the same manner as in the Master Transmitter Mode. When the

START condition has been transmitted, the interrupt service routine must load the

slave address and the data direction bit to I

C Data Register (I2CDATR). The I

Status Register (I2CSTAR) must be cleared by firmware, thus the SI bit is

automatically cleared, before the data transfer can continue.

When the slave address and data direction bit have been transmitted and an

acknowledge bit has been received, the SI bit is set, and the I

C Status Register

(I2CSTAR) will show the status code. The possible status codes are 40h or 48h.