User guide

Arch Meter Corporation PS1000 Ver1.2
PS1000Rev. 1.2 May 2006
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I2CSTAR (I
2
C Status Register)
I2CSTAR(SFR 0xB5) Reset value 00h
B7 B6 B5 B4 B3 B2 B1 B0
STAR.4 STAR.3 STAR.2 STAR.1 STAR.0 0 0 0
This register contains the status code of I
2
C interface. The least three bits are
always zero. There are 26 possible status codes. When the code is 00H, there is no
relevant information available and SI bit is not set. All other 25 status codes
correspond to defined I
2
C states. When any of these statuses entered, the SI bit will
be set. When the interrupt service routine completes, the firmware should clear
this register, and the SI will be automatically cleared. The detailed description of
the 26 status code is shown later in this documentation.
BIT SYMBOL FUNCTION
I2CSTAR7, 3 STA4, 0 I
2
C the status code, the firmware should clear this
register while interrupt service routine completes
I2CSTAR2, 0 - These three bits are not used and always set to 0
I2CADRR (I
2
C Slave Address Register)
Reset value 00h
I2CADRR(SFR 0xB6)
B7 B6 B5 B4 B3 B2 B1 B0
ADRR.6 ADRR.5 ADRR.4 ADRR.3 ADRR.2 ADRR.1 ADRR.0 GCEN
I2CADRR register is readable and writable, and is only used when the I
2
C
interface is set to slave mode. In master mode, this register has no effect. The LSB
of I2CADRR is general call bit. When this bit is set, the general call address (00H)
is recognized.
BIT SYMBOL FUNCTION
I2CADRR7, 1 ADRR6, 0 7-bit own slave address
When in master mode, the contents of this register
has no effect.
I2CADRR0 GCEN General call enable bit
1 = the general call address (00H) is recognized
0 = the general call address is ignored
I2CDATR (I
2
C Data Register)
I2CDATR(SFR 0xB7) Reset value FFh
B7 B6 B5 B4 B3 B2 B1 B0
DATR.7 DATR.6 DATR.5 DATR.4 DATR.3 DATR.2 DATR.1 DATR.0