User guide

Arch Meter Corporation PS1000 Ver1.2
PS1000Rev. 1.2 May 2006
35/ 67
www.archmeter.com
9.1 Registers
The micro-controller interfaces with the I
2
C-bus through six Special Function
Registers (SFRs): I
2
CCKHR (I
2
C SCL Duty Cycle Register High Byte),
I2CCKLR (I
2
C SCL Duty Cycle Register Low Byte), I2CCTLR (I
2
C Control
Register), I2CSTAR (I
2
C Status Register), I2CADRR (I
2
C Slave Address
Register), and I2CDATR (I
2
C Data Register).
I2CCKHR (I
2
C SCL Duty Cycle Register High Byte)
I2CCKHR(SFR 0xB2) Reset value: 23h
B7 B6 B5 B4 B3 B2 B1 B0
CKHR.7 CKHR.6 CKHR.5 CKHR.4 CKHR.3 CKHR.2 CKHR.1 CKHR.0
I2CCKLR (I
2
C SCL Duty Cycle Register Low Byte)
I2CCKLR(SFR 0xB3) Reset value 23h
B7 B6 B5 B4 B3 B2 B1 B0
CKLR.7 CKLR.6 CKLR.5 CKLR.4 CKLR.3 CKLR.2 CKLR.1 CKLR.0
The registers, I2CCKHR and I2CCKLR, define the data rate of the I
2
C
interface. I2CCKHR defines the number of the system clock for SCL = high,
I2CCKLR defines the number of the system clock for SCL = low. The frequency
of data transfer is determined by the following formula:
Bit frequency = f
SYSTEM_CLOCK
/ (I2CCKHR + I2CCKLR)
The values for I
2
CCKHR and I2CCKLR do not have to be the same.
Different duty cycle can be defined by setting these two registers. However, the
value of the register must ensure that the data rate is in the I
2
C data rate range of