User guide

Arch Meter Corporation PS1000 Ver1.2
PS1000Rev. 1.2 May 2006
10/ 67
www.archmeter.com
0111 ADC_CLK / 384 31.25K 28.65K
1000 ADC_CLK / 544 22.06K 20.22K
1001 ADC_CLK / 1088 11.03K 10.11K
1010 ADC_CLK / 512 23.44K 21.48K
1011 ADC_CLK / 1024 11.72K 10.74K
1100 ADC_CLK / 136 88.24K 80.88K
1101 ADC_CLK / 272 44.12K 40.44K
1110 ADC_CLK / 128 93.75K 85.94K
1111 ADC_CLK / 256 46.88K 42.97K
In the PS1000, it still has one ADC for temperature measurement. This ADC
can be controlled by the SARCFG.
SARCFG (0xFE22)
B7 B6 B5 B4 B3 B2 B1 B0
EN x x SARDIV[4:0]
EN: SAR ADC Enable or Disable
0: Disable SAR ADC
1: Enable SAR ADC
SARDIV [4:0]: SAR ADC selection. The clock range is 100K ~ 2MHz. The SAR
ADC will output one ADC data every 13 SAR ADC clock
SARDIV[4:0] SYSCLK(24M) SYSCLK(22M)
00000 SYSCLK / 2 Not suggest Not suggest
00001 SYSCLK / 4 Not suggest Not suggest
00010 SYSCLK / 6 Not suggest Not suggest
00011 SYSCLK / 8 Not suggest Not suggest
00100 SYSCLK / 10
184.6
169.2
00101 SYSCLK / 12
153.8
141.0
00110 SYSCLK / 14
131.9
120.9
00111 SYSCLK / 16
115.4
105.8
01000 SYSCLK / 18
102.6
94.0
01001 SYSCLK / 20
92.3
84.6
01010 SYSCLK / 22
83.9
76.9
01011 SYSCLK / 24
76.9
70.5
01100 SYSCLK / 26
71.0
65.1
01101 SYSCLK / 28
65.9
60.4
01110 SYSCLK / 30
61.5
56.4
01111 SYSCLK / 32
57.7
52.9
10000 SYSCLK / 34
54.3
49.8
10001 SYSCLK / 36
51.3
47.0
10010 SYSCLK / 38
48.6
44.5