User's Manual

COMPANY CONFIDENTIAL
PHILIPS CE
BCU PERIPHERALS &
ACCESSORIES
Project Office
Product Specification CPWUA054 AV84-MMN/LP/03-11-21.00 Rev
0.2
Page: 8/18
2004 Dec 13
Author: Luuk Pals
Supersedes:
Date:
SNU6500
8
Chapter 2 Hardware
General Overview
USB 2.0 Interface and 802.11 g chipset-on-board design.
Antenna: 1. Internal two Antenna
2. External LNA module antennaÆ No external antenna
2.1 Hardware Architecture
The Hardware architecture displayed below is delivered from the specification of Arcadyan
The architecture is based on the Atheros chipset
Hardware Architecture:
Main Chipset Information
2.1.1
Atheros AR5523+AR2112
2.1.2 An IEEE 802.11g MAC + Baseband processor, on-chip SRAM memory and USB2.0
interface. Radio-on-Chip (RoC). A zero-IF direct down conversion transceiver.
AR2112
8021.11b/g