Technical information

CHAPTER 2
Architecture
22 Processor Module
This chapter describes the architecture of the PowerBook G3 Series 1999
computer with emphasis on the aspects that are new or different from those of
earlier PowerBook computers.
The architecture of the PowerBook G3 Series 1999 computer is designed around
two main circuit boards: the processor module and the main logic board.
Figure 2-1 is a block diagram showing the major components and the
relationship of the processor module and the main logic board. (The modem
module shown in the diagram is described with the main logic board.)
Processor Module 2
The processor module contains the high-speed components:
■ G3 microprocessor
■ backside cache memory (512 KB or 1 MB)
■ main memory (minimum of 64 MB)
■ system ROM (1 MB)
■ memory controller and PCI bus bridge IC
This section includes a description of the microprocessor, the backside cache,
and the IC that contains the memory controller and PCI bus bridge. For a
description of the SO-DIMMs that contain the main memory, please see the
section “RAM Expansion Slots” (page 69).
G3 Microprocessor 2
The current family of PowerPC microprocessor designs is called “G3,” for
“generation three.” The G3 microprocessors have several features that
contribute to improved performance, including:
■ larger on-chip (L1) caches, 32 KB each for instruction cache and data cache
■ a built-in cache controller and cache tag RAM for the L2 cache
■ a separate backside bus for the L2 cache, providing faster clock speed and
overlapped bus transactions
■ a microprocessor core optimized for Mac OS applications