Technical information

CHAPTER 2
Hardware Design
18
Processor and Memory System
into the cause of the interrupt can be determined by use of the secondary interrupt status
registers for COM1 and COM2 ports, keyboard and mouse port, and DMA channel.
The interrupt and status registers in the Pretzel Logic IC are accessible from the
Macintosh environment only. From the PC environment, the registers for the COM1 and
COM2 ports and for the printer port match their standard definitions.
Bus Arbitration 2
The PC system bus supports the 80486 microprocessor (as bus master) and the two 8-bit
DMA channels on the sound expansion connector. DMA cycles between the PC and
Macintosh memory or peripherals do not use the DMA controllers in the 84035 data path
controller IC but instead require the processor to poll the DMA status register and
perform I/O reads and writes to the DMA data register in the Pretzel Logic IC.
The 84031 memory controller IC and the Pretzel Logic IC respond on the PC system bus
as slave devices.
The HOLD signal to the 80486 microprocessor is formed by the logical OR of the DMA
controller’s output with the autoconfiguration control output. The HOLD signal is used
by the DMA controller to hold off the processor for DMA transfer and at startup time to
tristate the processor address bus and allow the Pretzel Logic IC to autoconfigure.
Because there is no way of signaling a bus error to the 80486 microprocessor, no bus
timers exist on the PC side to monitor the PC system bus activity and terminate faulty
cycles. For an address outside the decoded range, the 84031 bus controller signals
completion and operation continues.
A bus error on the PC system bus will cause the PC to hang. When that happens, the
Macintosh environment is not affected, so it can be used to restart the PC, either by the
Ctl-Alt-Del key sequence if the PC keyboard is still responding or by the Cmd-Ctl-Alt-Del
key sequence if not.
The 84031 memory controller IC acts as the master of the XD(ISA) bus on the PC
side. The 8242 keyboard controller and the 82C450 VGA controller respond only as
slave devices on this bus.
The Macintosh system bus on the Power Macintosh 6100 can support three bus masters.
Table 2-3 summarizes the fixed arbitration device assignments and priorities.
Table 2-3 Arbitration priorities
Priority Device
Highest DRAM refresh
I/O DMA
Video refresh
Pretzel Logic (PDS)
Lowest PowerPC 601 processor