Specifications

CHAPTER 2
Hardware Design
20 Hardware Features
7” Card Memory Control—DRAM and External Cache 2
DRAM for the 7” card is provided by a 168-pin DIMM that accommodates an 8 MB, 16
MB, 32 MB, or 64 MB DIMM. The 7” card comes with an 8 MB DIMM installed. You can
replace this DIMM with one of higher capacity, to provide a maximum DRAM capacity
of 64 MB. As shown in Figure 2-7, the DIMM has a 32-bit data bus and is addressed as
banks 1 through 4.
The 7” card has four static RAMs that make up the 128 KB cache memory. Each static
RAM has an 8-bit data bus. The memory controller controls all transfers between the
microprocessor and the external cache. It generates the cache chip select signal, KCE L
3:0, and the read/write signal, KWEX. It buffers the control signals and drives them out
to the cache. It drives the cache address lines through external latches that hold the last
address as the microprocessor generates the next address.
Figure 2-7 DRAM control for the 7” card
Sensing DIMM Presence 2
The Mustard ASIC senses the presence of a DIMM in the DIMM slot when the system
starts up and then registers that information. However, the PC BIOS determines the size
of the memory using a sizing algorithm, and the BIOS programs the memory controller’s
configuration registers with the starting and ending address of each memory bank.
BIOS Control 2
PC computers use a BIOS. The 12” and 7” cards have a combined BIOS consisting of
both system and VGA BIOS. The BIOS is stored in Macintosh memory and downloaded
to the DRAM on the 12” and 7” cards when the system starts up.
5x86-class
microprocessor
PCI chip set
82C496 memory
controller
32K
D(31:24)
D(23:16)
D(15:8)
D(7:0)
128KB x 8
cache memory
DIMM
4 static RAMs
8-bit data buses
MD(31:0)
DIMMs up to 64 MB
provide DRAM. Basic
installation has an
8MB DIMM
32-bit data bus
D(31:0)