Specifications

High-Bandwidth Server
Architecture
The PowerPC G5 is only part of the Xserve performance story. Xserve G5 features dual
independent frontside buses to keep data moving in and out of each processor, and a
superefficient point-to-point system controller allows data to move directly between
all subsystems. Bandwidth is further enhanced by a 400MHz, 128-bit memory bus and
a high-speed HyperTransport interface that connects the PCI-X controller and the I/O
subsystems to the system controller. Together these advanced technologies provide
the power and throughput for demanding Internet applications, robust network infra-
structure solutions, and high-performance computational clustering environments.
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Technology Overview
Xserve G5
Server-Optimized Architecture
Gigahertz frontside bus. Runs at half the speed of
the processor and provides up to 9.2GB/s bandwidth
between the processor and the rest of the system.
Dual independent frontside buses. Provide up to
18.4GB/s aggregate bandwidth in dual processor systems.
Advanced system controller. Uses a point-to-point
architecture to enable data to pass directly between
subsystems.
400MHz ECC memory. Uses a 128-bit-wide data path to
support high-speed PC3200 SDRAM with Error Correction
Code (ECC) protection.
PCI-X expansion. Supports two high-performance
100MHz PCI-X cards or one 133MHz PCI-X card, providing
total throughput of up to 1GB/s.
Dual onboard Gigabit Ethernet. Provides two indepen-
dent ports, as well as hardware support for VLAN, jumbo
frames, and TCP, IP, and UDP hardware checksum.
High-performance I/O controller. Integrates three
fast Serial ATA (SATA) drive controllers and FireWire 800
interfaces using a HyperTransport interconnect.
Serial ATA storage. Supports up to 1.2TB of affordable
hot-plug internal storage
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using three independent,
high-performance 150MB/s SATA drive controllers.
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