Specifications

Apple II Technical Notes

6 of 6 #68: Tips for I/O Expansion Slot Card Design

solid technique is using the first rising edge of the 7M clock, after PH0 rises. This method may

require an additional flip-flop, but it guarantees the desired delay. On the other hand, expansion

card read data buffers should be turned off as soon as possible when PH0 falls to avoid a fight

when the data buffers turn back out again. Figure 3 shows the recommended data transfer timing

for the data bus.

PH0

D7-D0

Recommended Delay

0 to 30ns (as short as possible)

Video Data Data from I/O Card

Figure 3–Recommended Data Transfer Timing

Ground Noise

Since the Apple II expansion slots were designed with only one ground pin, complex expansion

cards sometimes have problems with excessive ground noise—especially in the IIGS, where the

signals typically have faster rise and fall times. To reduce ground noise as much as possible, it is

helpful to bypass all four supply voltages (+5 volt, +12 volt, –5 volt, –12 volt) to ground with

electrolytic or solid tantalum capacitors, even if all the available voltages are not used on the

expansion card. This additional bypassing has the effect of providing an improved ground by

providing additional AC ground paths through the various supply pins.

To maintain a consistent ground quality over the board area on two-layer boards, it is important

to properly grid the Vcc and ground traces and to fill in unused areas with ground plane.

Expansion Card Power Consumption

The Apple IIe and Apple IIGS expansion slot specifications indicate a total of 500 mA of +5 volt,

250 mA of +12 volt, 200 mA of -5 volt, and 200 mA of -12 volt power is available to all the

expansion slots. With design improvements, the power required by disk drives has been

reduced. Also, the Apple IIGS power supply is conservatively designed so there is somewhat

more power available than indicated on the original specification. However, there is not

unlimited power available, and expansion card developers should minimize power consumption

as much as possible. Minimization can be accomplished by using CMOS wherever possible,

using ROMs or RAMs with “power-down” mode when they are not enabled, and generally being

careful to minimize parts count.