Specifications
Section-4 Theory
November 11, 2013
4‐26
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Figure 4-15 AC/DC Converter Interface Block Diagram
4.6.3.4 PAMonitorBoard
ThePAMonitorBoardcontrolsandmonitorsthePAmodule’soperation.Allanalogparametersofthepower
amplifieraremonitoredandevaluatedviatheanalogcomparatorstogeneratetheOK/FAULTlogicsignal,andthe
signalissenttoaCPLDdevicetorealizeapre‐definedcontrollogicalgorithm.Thefault
andwarninginformationis
displayedbythered/greenLED’s infrontofthePA,andthefaultsignaliscodedanddeliveredtotheUCPinthe
MaxivaULXtransmitterviaindividualseparatewires.TheoverallcontrollogicisdoneviaaCPLDdeviceandthereis
nomicroprocessoron
boardandthereisnoserialcommunicationdesignedintothePAmonitorboard.
Onlyonefaultcanbedetectedatatime.Iftwoormorefaultconditionsaredetectedsimultaneouslyonlythe
highestpriorityfaultisshownthroughthefrontpanelLEDsSee
Table4‐15onpage4‐27foradescriptionoftheLED
indications.Theprioritytableisdesignedtosegregatefaultthatismostlikelyresponsibleforotherfaultsthatshow
upsimultaneously.The3‐bitcodeassignedtothefaultwithhighe stpriorityissenttotheUCP.Followingtableshows
priorityassignmentandcorresponding3‐bitcodes.
Priority,Code,Description
• 0,000,NoFault
• 1,001,TemperatureFault
• 2,010,VSWRFault
• 3,011,OverdriveFault
• 4,100,PSFailure
• 5,101,MOSFETFault
• 6,110,RFINLowFault
TheMonitorboardcontainsthePAmodulecontrolcircuitry.ItisaCPLDcontrolledcircuit,whichacceptscommands
fromtheTCUandreturnsstatusandmonitoringsignalstotheTCU.WithinthePAmodule,thecommunicationpath
betweenMonitorboard andtheTCUisJ1ontheMonitorboardtoJ1
ontheSignalDistributionboard,J4onthe
SignaldistributionboardtoJ2ontheConnectorI/Oboard,andJ2toJ1ontheConnectorI/Oboard.TheMonitor
boardcommunicateswithalloftheotherboardsinthePAmoduleviaitsconnectorsJ1,J2,andJ4.ConnectorJ3
on
theMonitorboardisatestoutputusedbyengineering.










