Specifications
Table Of Contents
- Title Page
- Table of Contents
- List of Figures
- List of Tables
- 1 Introduction
- 2 Installation
- 3 Navigating the LCD Display Screens
- 3.1 Basic Operating Procedure
- 3.2 Starting Point: The Main LCD Touch Screen
- 3.3 LCD Display Flow Chart
- 3.4 Details of the Exciter Status Screens
- 3.4.1 System Status Screen
- 3.4.2 Transport Stream Status Screen
- 3.4.3 Adaptive Processing Board Status Screen
- 3.4.4 Digital Processing Screens
- 3.4.4.1 Modulator Board Status, Screen 1/2
- 3.4.4.2 ADC and DAC Boards Status, Screen 2/2
- 3.4.4.3 FLO FPGA Status, Summary, Screen 1/5
- 3.4.4.4 FLO FPGA, GPS & Clock Status, Screen 2/5
- 3.4.4.5 FLO FPGA, Transport Stream Status, Screen 3/5
- 3.4.4.6 FLO FPGA, SFN FIFO Status, Screen 4/5
- 3.4.4.7 FLO FPGA, MTI Status, Screen 5/5
- 3.4.5 IF & RF Processing Status Screens
- 3.4.6 System Control Status Screens
- 3.5 Built In Tests
- 3.6 Details of the System Setup Screens
- 3.7 RTAC Operating Procedures, Main Screen.
- 4 Theory of Operation
- 5 Maintenance and Troubleshooting
- 5.1 Exciter Maintenance
- 5.2 Loading Software
- 5.3 Default Settings For DIagnostics Screens
- 5.4 Typical Settings for the More Critical Exciter Setups
- 5.5 Exciter Troubleshooting Flow Charts
- 5.6 General Troubleshooting
- 5.7 System Troubleshooting
- 5.8 Exciter Troubleshooting
- 6 Parts List
- Appendix A Exciter GUI Screen Captures
APEX™ Exciter Incorporating FLO™ Technologyr
General Description Theory of Operation
2604s400.fm
03/08/07 888-2604-001 Page: 4-1
WARNING: Disconnect primary power prior to servicing.
4 Theory of Operation
4.1 General Description
The program input to the exciter is a data signal called the “Transport Stream” which is
coded in the ASI format and has an impedance of 75 ohms. This form of coding allows the
clock signal to be recovered from the data stream, instead of requiring separate clock and
data paths.
The exciter processes this input into the on-channel transmission signal needed as drive for
the transmitter power amplifiers. RTAC™ (Real Time Adaptive Correction) correction
circuits in the exciter predistort the exciter RF output to compensate for errors which occur
in the power amplifiers and the high level RF output intermod filter. The purpose of the
correction circuits is to produce a transmitter output signal with good MER (modulation
error rate), good signal to noise ratio, and very low intermodulation (adjacent channel)
products. RTAC™ processing in the digital part of the exciter continually monitors and
trims exciter linear and nonlinear correction to maintain top performance.
Control and monitoring of the exciter is provided by a front panel display and remote
control connection, and, in some transmitters exciter control is also extended to the trans-
mitter control cabinet GUI (graphical user interface) display.
The APEX™ exciter performs the following general functions:
• ASI Input & Clock Distribution
• Data synchronization
• Channel encoding
• Pre-correction
• Nyquist filtering (spectral shaping)
• Up conversion
• RTAC™ (Real Time Adaptive Correction)
The on-channel RF signal is output through a 50-ohm SMA connector at the rear of the
exciter. This output signal is suitable for amplification in subsequent high-power stages.
4.2 Transmitter Systems Block Diagram
Figure 4-1 is a block diagram which shows a transmitter with an APEX exciter. This
diagram shows the ASI transport stream input to the exciter, the exciter RF output signal
connected to the transmitter IPA input, and the various required RF feedback signals from
the transmitter system to the exciter. These feedback signals are needed to perform the
linear and non-linear RTAC precorrection of exciter RF output signal.
The information contained in this overall system block diagram will be needed later, when
a detailed study of the APEX exciter block diagram is provided.
Additional exciter to transmitter systems interconnection information is covered in Section
2, Installation.