Specifications
Table Of Contents
- Title Page
- Table of Contents
- List of Figures
- List of Tables
- 1 Introduction
- 2 Installation
- 3 Navigating the LCD Display Screens
- 3.1 Basic Operating Procedure
- 3.2 Starting Point: The Main LCD Touch Screen
- 3.3 LCD Display Flow Chart
- 3.4 Details of the Exciter Status Screens
- 3.4.1 System Status Screen
- 3.4.2 Transport Stream Status Screen
- 3.4.3 Adaptive Processing Board Status Screen
- 3.4.4 Digital Processing Screens
- 3.4.4.1 Modulator Board Status, Screen 1/2
- 3.4.4.2 ADC and DAC Boards Status, Screen 2/2
- 3.4.4.3 FLO FPGA Status, Summary, Screen 1/5
- 3.4.4.4 FLO FPGA, GPS & Clock Status, Screen 2/5
- 3.4.4.5 FLO FPGA, Transport Stream Status, Screen 3/5
- 3.4.4.6 FLO FPGA, SFN FIFO Status, Screen 4/5
- 3.4.4.7 FLO FPGA, MTI Status, Screen 5/5
- 3.4.5 IF & RF Processing Status Screens
- 3.4.6 System Control Status Screens
- 3.5 Built In Tests
- 3.6 Details of the System Setup Screens
- 3.7 RTAC Operating Procedures, Main Screen.
- 4 Theory of Operation
- 5 Maintenance and Troubleshooting
- 5.1 Exciter Maintenance
- 5.2 Loading Software
- 5.3 Default Settings For DIagnostics Screens
- 5.4 Typical Settings for the More Critical Exciter Setups
- 5.5 Exciter Troubleshooting Flow Charts
- 5.6 General Troubleshooting
- 5.7 System Troubleshooting
- 5.8 Exciter Troubleshooting
- 6 Parts List
- Appendix A Exciter GUI Screen Captures

APEX™ Exciter Incorporating FLO™ Technology
Navigating the LCD Display Screens Details of the System Setup Screens
Page: 3-52 888-2604-001 03/08/07
WARNING: Disconnect primary power prior to servicing.
Frame Length = (Superframe Length – Pos. Pilot Length – 18) / 4;
• Local Length: (Unsigned Decimal integer, displayed only, not user configurable –
see below)
Local Length shall be calculated, written to the FPGA register, and displayed based
on the following formula:
Local Length = Frame Length – National Length – 4;
3.6.7.5 FPGA Configure 5/5, Restore Defaults
FPGASetup5.bmp
Figure 3-44 FPGA Configure 5/5, Restore Defaults
FPGA Configure 5/5 screen consists of the following four buttons.
• Restore Factory (Defaults)
• Restore Defaults
• Initialize FPGA
• Save as Defaults
Restore Factory Defaults loads all FPGA registers with the values defined as default
initialization values in the API, if defined, followed by a re-initialization of the FPGA.
Save as Defaults saves the current GUI settings that may have been modified by the user,
in non-volatile memory as default values for subsequent initialization and startup.
Restore Defaults recalls the previous set of values saved as default, followed by a
re-initialization of the FPGA.
Initialize FPGA manually starts the initialization sequence defined in the API, using the
current values indicated in the GUI.
Note: Restore Factory Defaults and Restore Defaults causes a warning window to pop up.
It states “WARNING: Restore will re-initialize exciter.”
• Clicking OK will start the restore and re-initialize process.
• Clicking cancel will abort the restore and re-initialization sequence.