Specifications
Table Of Contents
- Title Page
- Table of Contents
- List of Figures
- List of Tables
- 1 Introduction
- 2 Installation
- 3 Navigating the LCD Display Screens
- 3.1 Basic Operating Procedure
- 3.2 Starting Point: The Main LCD Touch Screen
- 3.3 LCD Display Flow Chart
- 3.4 Details of the Exciter Status Screens
- 3.4.1 System Status Screen
- 3.4.2 Transport Stream Status Screen
- 3.4.3 Adaptive Processing Board Status Screen
- 3.4.4 Digital Processing Screens
- 3.4.4.1 Modulator Board Status, Screen 1/2
- 3.4.4.2 ADC and DAC Boards Status, Screen 2/2
- 3.4.4.3 FLO FPGA Status, Summary, Screen 1/5
- 3.4.4.4 FLO FPGA, GPS & Clock Status, Screen 2/5
- 3.4.4.5 FLO FPGA, Transport Stream Status, Screen 3/5
- 3.4.4.6 FLO FPGA, SFN FIFO Status, Screen 4/5
- 3.4.4.7 FLO FPGA, MTI Status, Screen 5/5
- 3.4.5 IF & RF Processing Status Screens
- 3.4.6 System Control Status Screens
- 3.5 Built In Tests
- 3.6 Details of the System Setup Screens
- 3.7 RTAC Operating Procedures, Main Screen.
- 4 Theory of Operation
- 5 Maintenance and Troubleshooting
- 5.1 Exciter Maintenance
- 5.2 Loading Software
- 5.3 Default Settings For DIagnostics Screens
- 5.4 Typical Settings for the More Critical Exciter Setups
- 5.5 Exciter Troubleshooting Flow Charts
- 5.6 General Troubleshooting
- 5.7 System Troubleshooting
- 5.8 Exciter Troubleshooting
- 6 Parts List
- Appendix A Exciter GUI Screen Captures
APEX™ Exciter Incorporating FLO™ Technology
Details of the Exciter Status Screens Navigating the LCD Display Screens
2604s300.fm
03/08/07 888-2604-001 Page: 3-19
WARNING: Disconnect primary power prior to servicing.
3.4.5 IF & RF Processing Status Screens
The IF & RF Processing Status selection contains four sub screens, which are:
• UDC Interface Board, Screen 1 of 4
• PLL Board, Screen 2 of 4.
• Up Converter Board, Screen 3 of 4.
• Down Converter Board, Screen 4 of 4.
3.4.5.1 UDC Interface Board Status, Screen 1/4
UDCInterfaceStatus.bmp
Figure 3-17 UDC Interface Board Status, Screen 1/4
The UDC Interface Board screen is shown in Figure 3-17, with screen entries listed below.
• 15 Vdc: Input from power supply module
• -15 Vdc: Input from power supply module
• 5 Vdc: Output from 5 volt linear regulator chip U4.
• 3.3 Vdc: Output from 3.3 volt linear regulator chip U6.
• 8 Vdc: Output from 8 volt switching regulator
• Temp: This is the ambient air temperature inside the analog (top) side of the exciter.
• CPLD Rev: This is the revision level of the CPLD in the UDC Interface board.
• Board Rev: This is the board revision for the UDC Interface board.