Specifications
Table Of Contents
- Title Page
- Table of Contents
- List of Figures
- List of Tables
- 1 Introduction
- 2 Installation
- 3 Navigating the LCD Display Screens
- 3.1 Basic Operating Procedure
- 3.2 Starting Point: The Main LCD Touch Screen
- 3.3 LCD Display Flow Chart
- 3.4 Details of the Exciter Status Screens
- 3.4.1 System Status Screen
- 3.4.2 Transport Stream Status Screen
- 3.4.3 Adaptive Processing Board Status Screen
- 3.4.4 Digital Processing Screens
- 3.4.4.1 Modulator Board Status, Screen 1/2
- 3.4.4.2 ADC and DAC Boards Status, Screen 2/2
- 3.4.4.3 FLO FPGA Status, Summary, Screen 1/5
- 3.4.4.4 FLO FPGA, GPS & Clock Status, Screen 2/5
- 3.4.4.5 FLO FPGA, Transport Stream Status, Screen 3/5
- 3.4.4.6 FLO FPGA, SFN FIFO Status, Screen 4/5
- 3.4.4.7 FLO FPGA, MTI Status, Screen 5/5
- 3.4.5 IF & RF Processing Status Screens
- 3.4.6 System Control Status Screens
- 3.5 Built In Tests
- 3.6 Details of the System Setup Screens
- 3.7 RTAC Operating Procedures, Main Screen.
- 4 Theory of Operation
- 5 Maintenance and Troubleshooting
- 5.1 Exciter Maintenance
- 5.2 Loading Software
- 5.3 Default Settings For DIagnostics Screens
- 5.4 Typical Settings for the More Critical Exciter Setups
- 5.5 Exciter Troubleshooting Flow Charts
- 5.6 General Troubleshooting
- 5.7 System Troubleshooting
- 5.8 Exciter Troubleshooting
- 6 Parts List
- Appendix A Exciter GUI Screen Captures

APEX™ Exciter Incorporating FLO™ Technology
Table of Contents
Page: x 888-2604-001 03/08/07
WARNING: Disconnect primary power prior to servicing.
3.4 Details of the Exciter Status Screens. . . . . . . . . . . . . . . . . . 3-8
3.4.1 System Status Screen . . . . . . . . . . . . . . . . . . . . . . . . . . .3-8
3.4.2 Transport Stream Status Screen. . . . . . . . . . . . . . . . . . . . . .3-9
3.4.3 Adaptive Processing Board Status Screen . . . . . . . . . . . . . . . .3-9
3.4.3.1 Adaptive Processing Diagnostics . . . . . . . . . . . . . . 3-11
3.4.4 Digital Processing Screens . . . . . . . . . . . . . . . . . . . . . . . 3-12
3.4.4.1 Modulator Board Status, Screen 1/2 . . . . . . . . . . . . 3-12
3.4.4.2 ADC and DAC Boards Status, Screen 2/2 . . . . . . . . . 3-13
3.4.4.3 FLO FPGA Status, Summary, Screen 1/5. . . . . . . . . . 3-14
3.4.4.4 FLO FPGA, GPS & Clock Status, Screen 2/5 . . . . . . . 3-15
3.4.4.5 FLO FPGA, Transport Stream Status, Screen 3/5 . . . . . 3-16
3.4.4.6 FLO FPGA, SFN FIFO Status, Screen 4/5 . . . . . . . . . 3-17
3.4.4.7 FLO FPGA, MTI Status, Screen 5/5 . . . . . . . . . . . . 3-18
3.4.5 IF & RF Processing Status Screens . . . . . . . . . . . . . . . . . . . 3-19
3.4.5.1 UDC Interface Board Status, Screen 1/4 . . . . . . . . . . 3-19
3.4.5.2 PLL Board Status Screen . . . . . . . . . . . . . . . . . . 3-20
3.4.5.2.1 PLL Diagnostics 3-21
3.4.5.3 Up Converter Board Status Screen . . . . . . . . . . . . . 3-21
3.4.5.3.1 Up Converter Diagnostics 3-22
3.4.5.4 Down Converter Board Status Screen . . . . . . . . . . . 3-23
3.4.5.4.1 Down Converter Diagnostics 3-24
3.4.6 System Control Status Screens . . . . . . . . . . . . . . . . . . . . . 3-25
3.4.6.1 Controller Board Status Screen . . . . . . . . . . . . . . . 3-26
3.4.6.1.1 Controller Board Diagnostics 3-26
3.4.6.2 External I/O Board Status Screen . . . . . . . . . . . . . . 3-27
3.4.6.2.1 External I/O Diagnostics 3-28
3.4.6.3 CAN Bus Status Screen . . . . . . . . . . . . . . . . . . . 3-30
3.4.6.3.1 CAN Diagnostics 3-30
3.4.6.4 Front Panel Board Status Screen . . . . . . . . . . . . . . 3-30
3.4.6.5 GPS Status Screen. . . . . . . . . . . . . . . . . . . . . . 3-31
3.5 Built In Tests . . . . . . . . . . . . . . . . . . . . . . . . . . .3-32
3.6 Details of the System Setup Screens . . . . . . . . . . . . . . . . . .3-32
3.6.1 Restore Defaults Operation . . . . . . . . . . . . . . . . . . . . . . . 3-33
3.6.2 Exciter Setup Screen . . . . . . . . . . . . . . . . . . . . . . . . . . 3-35
3.6.2.1 Power Calibration . . . . . . . . . . . . . . . . . . . . . . 3-38
3.6.3 RTAC Setup Screen. . . . . . . . . . . . . . . . . . . . . . . . . . . 3-38