Specifications
Table Of Contents
- MX3W-E3 / MX3W-V3
- Hardware Installation
- About “Optional” and “Upgrade Optional”…
- Clear CMOS Data
- CPU Installation
- JP23 Adjust FSB/PCI Clock Ratio
- CPU Jumper-less Design
- CPU and Housing Fan Connector (with H/W Monitoring)
- DIMM Socket
- Front Panel Connector
- ATX Power Connector
- JP28 Keyboard/Mouse Wake-up
- Power and RAM Power Indicate LED
- AC Power Auto Recovery
- IDE and Floppy Connector
- IrDA Connector
- WOM (Zero Voltage Wake on Modem) Connector
- WOL (Wake on LAN)
- CNR (Communication and Network Riser) Expansion Slot
- Support IntelR PRO/100 Network Connection (Optional)
- JP13 LAN Enable / Disable Select Jumper (Optional)
- PC99 Color Coded Back Panel
- COM2 Connector
- Support 2nd USB Port
- DVO (Digital Video Out) Connector
- Chassis Intrusion Sensor
- CD Audio Connector
- Modem Audio Connector
- AUX-IN Connector
- Front Audio Connector
- GPO (General Purpose Output) Connector
- Over-current Protection
- Hardware Monitoring
- Resettable Fuse
- Low ESR Capacitor
- Layout (Frequency Isolation Wall)
- Driver and Utility
- AWARD BIOS
- Overclocking
- Glossary
- AC97
- ACPI (Advanced Configuration & Power Interface)
- AGP (Accelerated Graphic Port)
- AMR (Audio/Modem Riser)
- AOpen Bonus Pack CD
- APM (Advanced Power Management)
- ATA (AT Attachment)
- ATA/66
- ATA/100
- BIOS (Basic Input/Output System)
- Bus Master IDE (DMA mode)
- CNR (Communication and Networking Riser)
- CODEC (Coding and Decoding)
- DDR (Double Data Rated) SDRAM
- DIMM (Dual In Line Memory Module)
- DMA (Direct Memory Access)
- ECC (Error Checking and Correction)
- EDO (Extended Data Output) Memory
- EEPROM (Electronic Erasable Programmable ROM)
- EPROM (Erasable Programmable ROM)
- EV6 Bus
- FCC DoC (Declaration of Conformity)
- FC-PGA (Flip Chip-Pin Grid Array)
- Flash ROM
- FSB (Front Side Bus) Clock
- I2C Bus
- IEEE 1394
- Parity Bit
- PBSRAM (Pipelined Burst SRAM)
- PC-100 DIMM
- PC-133 DIMM
- PC-1600 or PC-2100 DDR DRAM
- PCI (Peripheral Component Interface) Bus
- PDF Format
- PnP (Plug and Play)
- POST (Power-On Self Test)
- RDRAM (Rambus DRAM)
- RIMM (Rambus Inline Memory Module)
- SDRAM (Synchronous DRAM)
- Shadow E2PROM
- SIMM (Single In Line Memory Module)
- SMBus (System Management Bus)
- SPD (Serial Presence Detect)
- Ultra DMA
- USB (Universal Serial Bus)
- VCM (Virtual Channel Memory)
- ZIP file
- Troubleshooting
- Technical Support
- Product Registration
- How to Contact Us

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FSB Clock means CPU external bus clock.
CPU internal clock = CPU FSB Clock x CPU Clock Ratio
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See SMBus.
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IEEE 1394 is a low-cost digital interface originated by Apple Computer as a desktop LAN and developed by the IEEE 1394
working group. The IEEE 1394 can transport data at 100, 200 or 400 Mbps. One of the solutions to connect digital television
devices together at 200 Mbps. Serial Bus Management provides overall configuration control of the serial bus in the form of
optimizing arbitration timing, guarantee of adequate electrical power for all devices on the bus, assignment of isochronous
channel ID, and notification of errors. There are two type of IEEE 1394 data transfer: asynchronous and isochronous.
Asynchronous transport is the traditional computer memory-mapped, load and store interface. Data requests are sent to a
specific address and an acknowledgment is returned. In addition to an architecture that scales with silicon technology, IEEE
1394 features a unique isochronous data channel interface. Isochronous data channels provide guaranteed data transport at a
pre-determined rate. This is especially important for time-critical multimedia data where just-in-time delivery eliminates the need
for costly buffering.
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