Specifications
Table Of Contents
- MX3W-E3 / MX3W-V3
- Hardware Installation
- About “Optional” and “Upgrade Optional”…
- Clear CMOS Data
- CPU Installation
- JP23 Adjust FSB/PCI Clock Ratio
- CPU Jumper-less Design
- CPU and Housing Fan Connector (with H/W Monitoring)
- DIMM Socket
- Front Panel Connector
- ATX Power Connector
- JP28 Keyboard/Mouse Wake-up
- Power and RAM Power Indicate LED
- AC Power Auto Recovery
- IDE and Floppy Connector
- IrDA Connector
- WOM (Zero Voltage Wake on Modem) Connector
- WOL (Wake on LAN)
- CNR (Communication and Network Riser) Expansion Slot
- Support IntelR PRO/100 Network Connection (Optional)
- JP13 LAN Enable / Disable Select Jumper (Optional)
- PC99 Color Coded Back Panel
- COM2 Connector
- Support 2nd USB Port
- DVO (Digital Video Out) Connector
- Chassis Intrusion Sensor
- CD Audio Connector
- Modem Audio Connector
- AUX-IN Connector
- Front Audio Connector
- GPO (General Purpose Output) Connector
- Over-current Protection
- Hardware Monitoring
- Resettable Fuse
- Low ESR Capacitor
- Layout (Frequency Isolation Wall)
- Driver and Utility
- AWARD BIOS
- Overclocking
- Glossary
- AC97
- ACPI (Advanced Configuration & Power Interface)
- AGP (Accelerated Graphic Port)
- AMR (Audio/Modem Riser)
- AOpen Bonus Pack CD
- APM (Advanced Power Management)
- ATA (AT Attachment)
- ATA/66
- ATA/100
- BIOS (Basic Input/Output System)
- Bus Master IDE (DMA mode)
- CNR (Communication and Networking Riser)
- CODEC (Coding and Decoding)
- DDR (Double Data Rated) SDRAM
- DIMM (Dual In Line Memory Module)
- DMA (Direct Memory Access)
- ECC (Error Checking and Correction)
- EDO (Extended Data Output) Memory
- EEPROM (Electronic Erasable Programmable ROM)
- EPROM (Erasable Programmable ROM)
- EV6 Bus
- FCC DoC (Declaration of Conformity)
- FC-PGA (Flip Chip-Pin Grid Array)
- Flash ROM
- FSB (Front Side Bus) Clock
- I2C Bus
- IEEE 1394
- Parity Bit
- PBSRAM (Pipelined Burst SRAM)
- PC-100 DIMM
- PC-133 DIMM
- PC-1600 or PC-2100 DDR DRAM
- PCI (Peripheral Component Interface) Bus
- PDF Format
- PnP (Plug and Play)
- POST (Power-On Self Test)
- RDRAM (Rambus DRAM)
- RIMM (Rambus Inline Memory Module)
- SDRAM (Synchronous DRAM)
- Shadow E2PROM
- SIMM (Single In Line Memory Module)
- SMBus (System Management Bus)
- SPD (Serial Presence Detect)
- Ultra DMA
- USB (Universal Serial Bus)
- VCM (Virtual Channel Memory)
- ZIP file
- Troubleshooting
- Technical Support
- Product Registration
- How to Contact Us

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System parameters can be modified by going into BIOS Setup menu, this menu allows you to configure the system parameters
and save the configuration into the 128 bytes CMOS area, (normally in the RTC chip or in the main chipset).
The AwardBIOS™ that installed in the Flash ROM
of the motherboard is a custom version of an industry standard BIOS. The
BIOS provides critical low-level support for standard devices such as hard disk drives, serial and parallel ports.
Most BIOS setting of MX3WE2 had optimized by AOpen’s R&D engineering team. But, the default setting of BIOS still can’t
fine-tune the chipset controlling entire system. Hence, the rest of this chapter is intended to guide you through the process of
configuring your system using setup.
To enter to BIOS setup menu, press <Del> when POST (Power-On Self Test) screen is shown on your monitor.
Note: Because the BIOS code is the most often
changed part of the motherboard design, the BIOS
information contained in this manual may be
different with actual BIOS that come with your
motherboard.
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