User guide
Nios II IDE Help System
Instruction Set Simulator (ISS)
The Nios II instruction set simulator (ISS) allows you to execute and debug Nios II programs
in simulation on a host PC. The ISS simulates software executing on a Nios II processor core
connected to a limited set of peripherals. The simulation is at the functional level, and all
operations complete in one cycle. It is not a cycle-accurate simulation, and therefore
performance benchmarking on the ISS gives optimistic results. On a modern Windows PC, the
ISS runs at about 300K instructions per second when simulating code on the fast example
design provided in the Nios II Embedded Design Suite.
The ISS can produce an execution trace. The trace output appears in the Console view, and
you can optionally redirect it to a file. It is common to output trace data to a file, because
trace tends to produce a large amount of information.
ISS-supported SOPC Builder Components
All Nios II processor cores: Nios II/f, Nios II/s, Nios II/e
Interval timer core
JTAG UART core
UART core
On-chip memory (RAM/ROM)
SDRAM controller core
IDT71V416 SRAM (1 MB SRAM mounted on Nios development board)
EPCS serial flash controller core, with limitations.
If any unsupported components are present in the system, the ISS displays a warning
message at the start of the run or debug session. The ISS ignores writes to unsupported
components during simulation. Reading from an unsupported component during simulation
returns zero.
SOPC Builder System Requirements
The Nios II ISS simulates a Nios II processor system described by an SOPC Builder system file
(.ptf). The Nios II ISS makes the following assumptions about the SOPC Builder system:
SOPC Builder successfully generated the .ptf file.
All memories with initialized content are initialized from one .elf file.
The system contains exactly one Nios II processor. The ISS does not support
multiprocessor systems.
The system has one clock domain.
The system has one address map. (This is true for all Nios II systems created by SOPC
Builder.)
ISS Limitations
Simulations are functional only, and not cycle-accurate.
The ISS does not model Nios II instruction and data caches, and will not find bugs
involving cache initialization, flushing, or bypassing.
86