Datasheet

Data Sheet SSM2603
Rev. C | Page 5 of 32
TIMING CHARACTERISTICS
Table 3. I
2
C® Timing
Limit
Parameter t
MIN
t
MAX
Unit Description
t
SCS
600 ns Start condition setup time
t
SCH
600 ns Start condition hold time
t
PH
600 ns SCLK pulse width high
t
PL
1.3 μs SCLK pulse width low
f
SCLK
0 526 kHz SCLK frequency
t
DS
100 ns Data setup time
t
DH
900 ns Data hold time
t
RT
300 ns SDIN and SCLK rise time
t
FT
300 ns SDIN and SCLK fall time
t
HCS
600 ns Stop condition setup time
Figure 2. I
2
C Timing
Table 4. Digital Audio Interface Slave Mode Timing
Limit
Parameter t
MIN
t
MAX
Unit Description
t
DS
10 ns PBDAT setup time from BCLK rising edge
t
DH
10 ns PBDAT hold time from BCLK rising edge
t
LRSU
10 ns RECLRC/PBLRC setup time to BCLK rising edge
t
LRH
10 ns RECLRC/PBLRC hold time to BCLK rising edge
t
DD
30 ns
RECDAT propagation delay from BCLK falling edge (external
load of 70 pF)
t
BCH
25 ns BCLK pulse width high
t
BCL
25 ns BCLK pulse width low
t
BCY
50 ns BCLK cycle time
Figure 3. Digital Audio Interface Slave Mode Timing
07241-036
SCLK
SDIN
t
RT
t
SCH
t
PL
t
DS
t
PH
t
DH
t
FT
t
SCS
t
HCS
07241-025
BCLK
PBLRC/
RECLRC
PBDAT
RECDAT
t
BCL
t
DS
t
LRSU
t
LRH
t
BCH
t
BCY
t
DD
t
DH