Datasheet

SSM2603 Data Sheet
Rev. C | Page 24 of 32
POWER MANAGEMENT, ADDRESS 0x06
Table 23. Power Management Register Bit Map
D8 D7 D6 D5 D4 D3 D2 D1 D0
0
PWROFF
CLKOUT
OSC
Out
DAC
ADC
MIC
LINEIN
Table 24. Description of Power Management Register Bits
Bit Name Description Settings
PWROFF Whole chip power-down control 0 = power up
1 = power down (default)
CLKOUT Clock output power-down control 0 = power up (default)
1 = power down
OSC Crystal power-down control 0 = power up (default)
1 = power down
Out Output power-down control 0 = power up
1 = power down (default)
DAC DAC power-down control 0 = power up
1 = power down (default)
ADC ADC power-down control 0 = power up
1 = power down (default)
MIC Microphone input power-down control 0 = power up
1 = power down (default)
LINEIN Line input power-down control 0 = power up
1 = power down (default)
Power Consumption
Table 25.
Mode PWROFF CLKOUT OSC OUT DAC ADC MIC LINEIN
AVDD
(3.3 V)
HPVDD
(3.3 V)
DCVDD
(3.3 V)
DBVDD
(3.3 V)
Unit
Record and Playback
0
0
0
0
0
0
0
0
10.7
2.2
3.6
3.1
mA
Playback Only
Oscillator Enabled 0 0 0 0 0 1 1 1 5.2 2.2 1.7 1.8 mA
External Clock 0 1 1 0 0 1 1 1 5.1 2.2 1.7 1.7 mA
Record Only
Line Input,
Oscillator
Enabled
0 0 0 1 1 0 1 0 4.7 N/A 2.0 1.9 mA
Line Input,
External Clock
0 0 1 1 1 0 1 0 4.7 N/A 2.0 1.8 mA
Microphone
Input, Oscillator
Enabled
0 0 0 1 1 0 0 1 4.8 N/A 2.0 1.9 mA
Microphone
Input, External
Clock
0 0 1 1 1 0 0 1 4.8 N/A 2.0 1.8 mA
Sidetone
(Microphone-to-
Line Output)
0 0 1 0 1 1 0 1 2.0 2.2 0.2 1.7 mA
Analog Bypass (Line
Input or Line
Output)
0 0 1 0 1 1 1 0 2.0 2.2 0.2 1.7 mA
Power-Down 1 1 1 1 1 1 1 1 0.001 <0.001 0.03 0.03 mA