Datasheet

REF19x Series
Rev. J | Page 20 of 28
APPLICATIONS INFORMATION
OUTPUT SHORT-CIRCUIT BEHAVIOR
The REF19x family of devices is totally protected from damage
due to accidental output shorts to GND or to V
S
. In the event of
an accidental short-circuit condition, the reference device shuts
down and limits its supply current to 40 mA.
V
S
OUTPUT
SLEEP (SHUTDOWN)
GND
00371-020
Figure 20. Simplified Schematic
DEVICE POWER DISSIPATION CONSIDERATIONS
The REF19x family of references is capable of delivering load
currents to 30 mA with an input voltage that ranges from 3.3 V
to 15 V. When these devices are used in applications with large
input voltages, exercise care to avoid exceeding the maximum
internal power dissipation of these devices. Exceeding the
published specifications for maximum power dissipation or
junction temperature can result in premature device failure. The
following formula should be used to calculate the maximum
junction temperature or dissipation of the device:
JA
A
J
D
TT
P
θ
=
where T
J
and T
A
are the junction and ambient temperatures,
respectively; P
D
is the device power dissipation; and θ
JA
is the
device package thermal resistance.
OUTPUT VOLTAGE BYPASSING
For stable operation, low dropout voltage regulators and
references generally require a bypass capacitor connected from
their V
OUT
pins to their GND pins. Although the REF19x family
of references is capable of stable operation with capacitive loads
exceeding 100 μF, a 1 μF capacitor is sufficient to guarantee
rated performance. The addition of a 0.1 μF ceramic capacitor
in parallel with the bypass capacitor improves load current
transient performance. For best line voltage transient perform-
ance, it is recommended that the voltage inputs of these devices
be bypassed with a 10 μF electrolytic capacitor in parallel with a
0.1 μF ceramic capacitor.
SLEEP MODE OPERATION
All REF19x devices include a sleep capability that is
TTL/CMOS-level compatible. Internally, a pull-up current
source to V
S
is connected at the
SLEEP
pin. This permits the
SLEEP
pin to be driven from an open collector/drain driver. A
logic low or a 0 V condition on the
SLEEP
pin is required to
turn off the output stage. During sleep, the output of the
references becomes a high impedance state where its potential
would then be determined by external circuitry. If the sleep
feature is not used, it is recommended that the
SLEEP
pin be
connected to V
S
(Pin 2).
BASIC VOLTAGE REFERENCE CONNECTIONS
The circuit in Figure 21 illustrates the basic configuration for
the REF19x family of references. Note the 10 μF/0.1 μF bypass
network on the input and the 1 μF/0.1 μF bypass network on
the output. It is recommended that no connections be made to
Pin 1, Pin 5, Pin 7, and Pin 8. If the sleep feature is not required,
Pin 3 should be connected to V
S
.
NC
NC
V
S
SLEEP
NC
NC
OUTPUT
0.1µF10µF
REF19x
NC = NO CONNECT
8
7
6
5
1
2
3
4
1µF
TANT
0.1µF
+
00371-021
Figure 21. Basic Voltage Reference Connections
MEMBRANE SWITCH-CONTROLLED POWER
SUPPLY
With output load currents in the tens of mA, the REF19x family
of references can operate as a low dropout power supply in
hand-held instrument applications. In the circuit shown in
Figure 22, a membrane on/off switch is used to control the
operation of the reference. During an initial power-on condi-
tion, the
SLEEP
pin is held to GND by the 10 kΩ resistor. Recall
that this condition (read: three-state) disables the REF19x
output. When the membrane on switch is pressed, the
SLEEP
pin is momentarily pulled to V
S
, enabling the REF19x output.
At this point, current through the 10 kΩ resistor is reduced and
the internal current source connected to the
SLEEP
pin takes
control. Pin 3 assumes and remains at the same potential as V
S
.
When the membrane off switch is pressed, the
SLEEP
pin is
momentarily connected to GND, which once again disables the
REF19x output.