Datasheet

OP177–SPECIFICATIONS
REV. B–4–
ELECTRICAL CHARACTERISTICS
OP177E OP177F OP177G
Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Units
Input Offset Voltage V
OS
10 20 15 40 20 100 µV
Average Input Offset
Voltage Drift TCV
OS
(Note 1) 0.03 0.1 0.1 0.3 0.7 1.2 µV/°C
Input Offset Current I
OS
0.5 1.5 0.5 2.2 0.5 4.5 nA
Average Input Offset
Current Drift TCI
OS
(Note 2) 1.5 25 1.5 40 1.5 85 pA/°C
Input Bias Current I
B
–0.2 2.4 4 –0.2 2.4 4 2.4 ±6.0 nA
Average Input Bias
Current Drift TCI
B
(Note 2) 8 25 8 40 15 60 pA/°C
Input Voltage Range IVR (Note 3) ±13 ±13.5 ±13 ±13.5 ±13.0 ±13.5 V
Common-Mode
Rejection Ratio CMRR V
CM
= ±13 V 120 140 120 140 110 140 dB
Power Supply Rejection
Ratio PSRR V
S
= ±3 V to ±18 V 120 125 110 120 106 115 dB
Large-Signal
Voltage Gain A
VO
R
L
≥ 2 kΩ, V
O
= ±10 V
4
2000 6000 2000 6000 1000 4000 V/mV
Output Voltage Swing V
O
R
L
≥ 2 kΩ±12 ±13.0 ±12 ±13.0 ±12.0 ±13.0 V
Power Consumption P
D
V
S
= ±15 V, No Load 60 75 60 75 60 75 mW
Supply Current I
SY
V
S
= ±15 V, No Load 2.0 2.5 2.0 2.5 2.0 2.5 mA
NOTES
1
OP177E: TCV
OS
is 100% tested.
2
Guaranteed by endpoint limits.
3
Guaranteed by CMRR test condition.
4
To insure high open-loop gain throughout the ±10 V output range, A
VO
is tested at –10 V ≤ V
O
≤ 0 V, 0 V ≤ V
O
≤ +10 V, and –10 V ≤ V
O
≤ +10 V.
Specifications subject to change without notice.
Figure 2. Typical Offset Voltage Test Circuit
Figure 3. Optional Offset Nulling Circuit
(@ V
S
= 615 V, –40°C ≤ T
A
≤ +858C, unless otherwise noted)