Datasheet

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POWER CONDITIONING - SMT
3
HMC1060LP3E
v00.1211
QUAD LOW NOISE HIGH PSRR
LINEAR VOLTAGE REGULATOR
Figure 1. Typical Output Noise Density at
Each HMC1060LP3E Output
Figure 2. Typical Output Noise Density vs.
Capacitor Values
[1]
Figure 4. VR4 PSRR vs. VDD (4.7µF on
VR4 and VREF)
Figure 3. VR1, VR2, VR3, & VR4 Power
Supply Rejection Ratio (PSRR)
Figure 5. VR1, 2, 3 Voltage vs.
Temperature, PTAT Mode Disabled
10
-10
10
-9
10
-8
10
-7
10
-6
10
2
10
3
10
4
10
5
10
6
10
7
VR1 100 mA
VR2 50 mA
VR3 50 mA
VR4 300 mA
FREQUENCY (Hz)
NOISE DENSITY (V/√Ηz)
-110
-100
-90
-80
-70
-60
-50
-40
10
2
10
3
10
4
10
5
10
6
10
7
VR4 300 mA Load Current
VR1 100 mA Load Current
VR2 & VR3 50 mA Load Current
PSRR (dB)
FREQUENCY (Hz)
3.2
3.25
3.3
3.35
3.4
3.45
-40 -20 0 20 40 60 80
VR1 100 mA Load Current
VR2 50 mA Load Current
VR3 50 mA Load Current
OUTPUT VOLTAGE (V)
TEMPERATURE (
O
C)
10
-10
10
-9
10
-8
10
-7
10
-6
10
2
10
3
10
4
10
5
10
6
10
7
10 uF @ VRx & 4.7 uF @ VREF
10 uF @ VRx & 1 uF @ VREF
4.7 uF for All
1 uF for All
FREQUENCY (Hz)
NOISE DENSITY (V/√Ηz)
-90
-80
-70
-60
-50
-40
-30
-20
10
2
10
3
10
4
10
5
10
6
10
7
VDD 5.6V
VDD 5.4V
VDD 5.2V
PSRR (dB)
FREQUENCY (Hz)
3.2
3.25
3.3
3.35
3.4
3.45
-40 -20 0 20 40 60 80
VR1 100 mA Load Current
VR2 50 mA Load Current
VR3 50 mA Load Current
OUTPUT VOLTAGE (V)
TEMPERATURE (
O
C)
Figure 6. VR1, 2, 3 Voltage vs.
Temperature, PTAT Mode Enabled
[1] VREF capacitor corresponds to C1 in Application Schematic. VRx capacitors correspond to capacitors C10, C7, C8, C9 at the output of VR1, VR2,
VR3 and VR4 pins of the HMC1060LP3E respectively.
Typical Performance Characteristics
T
A
= +25 °C, VDD = 5.6 V, Unless Otherwise Specied, PTAT Mode is disabled, measured at maximum load conditions
in default conguration as shown in Application Schematic.
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Phone: [phone] • Order online at www.analog.com
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