Datasheet

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POWER CONDITIONING - SMT
9
HMC1060LP3E
v00.1211
QUAD LOW NOISE HIGH PSRR
LINEAR VOLTAGE REGULATOR
Application Schematic
In order to achieve the typical noise performance specied in the Electrical Specications Table, a 4.7 µF decoupling
capacitor between REF and GND pins (C1), and 100 nF capacitors connected between output pins VRx (x=1,2,3,4)
and respective RDx pins (C2, C3, C4 and C5) are required. If noise performance is not critical for a particular output,
the 100 nF capacitor can be omitted for the corresponding regulator output. In that case, noise spectral density will
typically increase by a factor of 20 at 10 kHz. The 4.7 µF REF capacitor causes approximately 40 ms typical turn-on
start-up time. The effects of reducing the REF capacitor on regulator noise performance and regulator turn-on time
are shown in Figure 2 and External Enable Pin & Power Up Timing section respectively.
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