Datasheet

EVAL-AD7400A/AD7401A
Rev. 0 | Page 5 of 16
INTERFACING THE EVALUATION BOARD TO
THE EVAL-CED1Z
Interface the EVAL-CED1Z board to the evaluation board via
a SPORT connector, J12. This standard 2-row, 0.1” connector
is used to connect the EVAL-AD7400A/AD7401A board to the
EVAL-CED1Z controller board. Table 3 gives a description of
the pins and the pin designations on the SPORT connector used
to interface between the EVAL-CED1Z board and the EVAL-
AD7400A/AD7401A.
Table 3. SPORT Connector Pin Functions
Pin Connection Description
1 +5VD_Edge 5 V digital supply.
2 +7V 7 V analog supply.
3 DGND Digital ground. These lines are connected to the digital ground plane on the evaluation board.
4 NC No connect. Do not use this pin.
5
RESET
Reset.
6 SPORT_TSCLK0/SPI_SEL5 SPORT 0 transmit serial clock. SPI Peripheral Chip Select 5.
7 SPORT_RFS0/SPI_SEL3 SPORT 0 receive frame sync. SPI Peripheral Chip Select 3.
8 SPORT_DROPRI/SPI_SEL4
SPORT 0 Data Receive Primary. SPI Peripheral Chip Select 4. This input is connected to the MDAT pin of
the AD7400A or AD7401A.
9 DGND Digital ground.
10 SPORT_DR0SEC Sport 0 data receive secondary; parallel.
11 SPORT_TFS0/SPI_SEL6 Sport 0 transmit frame sync. SPI Peripheral Chip Select 6.
12 SPORT_DT0SEC Sport 0 data transmit secondary.
13 +2.5VD/3.3V_EDGE 2.5 V/3.3 V digital supply.
14 SPORT_DT0PRI/SPI_SEL7 Sport 0 data transmit primary. SPI Peripheral Chip Select 7.
15 +3.3VD_EDGE 2.5 V/3.3 V digital supply.
16 SPORT_RSCLK0/SPI_SEL2
SPORT 0 receive serial clock. SPI Peripheral Chip Select 2. This continuous clock is connected to the
MCLKOUT pin of the AD7400A via J7.
17
SPI_SS
SPT slave select.
18 SPI_MOSI SPI master out, slave in data line.
19 SPI_SEL1 SPI Peripheral Chip Select 1.
20 SPI_MISO SPI master in, slave out data line.
21 SPI_SEL2 SPI Peripheral Chip Select 2.
22 SPI_CLK SPI clock.
23 SPI_SEL3 SPI Peripheral Chip Select 3.
24 TWI_SDA 2-wire interface serial data.
25 SPI_SEL4 SPI Peripheral Chip Select 4.
26 TWI_SCL 2-wire interface serial clock.
27 SPI_SEL5 SPI Peripheral Chip Select 5.
28 RXINT/GPIO2/PPI_FS3
Receive data interrupt. General-Purpose I/O Bit 2.
Parallel Peripheral Interface Frame Sync 3.
29 SPI_SEL6 SPI Peripheral Chip Select 6.
30 GPIO3/TMR1/PPI_FS1
General-Purpose I/O Bit 3.
Timer 1. Parallel Peripheral Interface Frame Sync 1.
31 SPI_SEL7 SPI Peripheral Chip Select 7.
32 TMR0/PPI_FS2 Timer 0. Parallel Peripheral Interface Frame Sync 2.
33 DGND Digital ground.
32 DGND Digital ground.