Datasheet

EVAL-AD7265/AD7266
Rev. 0 | Page 4 of 24
Link No. Description
LK7 This link option selects the source of the V
B1
analog input.
In Position A, V
B1
is supplied from the output of the unity gain buffer, U4-A, in which case a signal must be applied to the SVIN3
socket via J15.
In Position B, V
B1
is supplied from the positive output (V3+) of the single-ended-to-differential converter, U7-B, in which case a
single-ended signal must be applied to V3 DIFF via Socket J20.
In Position C, V
B1
is tied to AGND. If this channel is not in use, this link should be in Position C.
LK8 This link option selects the source of the V
B2
analog input.
In Position A, V
B2
is supplied from the output of the unity gain buffer, U4-B, in which case a signal must be applied to the SVIN4
socket via J16.
In Position B, V
B2
is supplied from the negative output (V3−) of the single-ended-to-differential converter, U7-A, in which case a
single-ended signal must be applied to V3 DIFF via Socket J20.
In Position C, V
B2
is tied to AGND. If this channel is not in use, this link should be in Position C.
LK9 This link option selects the source of the V
B3
analog input.
In Position A, V
B3
is supplied from the output of the unity gain buffer, U4-A, in which case a signal must be applied to the SVIN3
socket via J15.
In Position B, V
B3
is supplied from the positive output (V4+) of the single-ended-to-differential converter, U8-B, in which case a
single-ended signal must be applied to V4 DIFF via Socket J22.
In Position C, V
B3
is tied to AGND. If this channel is not in use, this link should be in Position C.
LK10 This link option selects the source of the V
B4
analog input.
In Position A, V
B4
is supplied from the output of the unity gain buffer, U4-B, in which case a signal must be applied to the SVIN4
socket via J16.
In Position B, V
B4
is supplied from the negative output (V4−) of the single-ended-to-differential converter, U8-A, in which case a
single-ended signal must be applied to V4 DIFF via Socket J22.
In Position C, V
B4
is tied to AGND. If this channel is not in use, this link should be in Position C.
LK11 This link option selects the source of the V
B5
analog input.
In Position A, V
B5
is supplied from the output of the unity gain buffer, U4-A, in which case a signal must be applied to the SVIN3
socket via J15.
In Position B, V
B5
is supplied from the positive output (V3+) of the single-ended-to-differential converter, U7-B, in which case a
single-ended signal must be applied to V3 DIFF via Socket J20.
In position C, V
B5
is tied to AGND. If this channel is not in use, this link should be in Position C.
LK12 This link option selects the source of the V
B6
analog input.
In Position A, V
B6
is supplied from the output of the unity gain buffer, U4-B, in which case a signal must be applied to the SVIN4
socket via J16.
In Position B, V
B6
is supplied from the negative output (V3−) of the single-ended-to-differential converter, U7-A, in which case a
single-ended signal must be applied to V3 DIFF via Socket J20.
In Position C, V
B6
is tied to AGND. If this channel is not in use, this link should be in Position C.
LK13 This link option selects the source or destination of the reference voltage applied to or received from the D
CAP
A pin of the
AD7265/AD7266.
In Position A, an external reference signal can be applied to the D
CAP
A pin via J24, or the internal reference voltage from the
AD7266/AD7265 can be accessed via J24. This link should be used in conjunction with LK19, which determines whether an
internal or external reference is used with the device.
In Position B, the AD780 provides an external 2.5 V reference to the D
CAP
A pin. This link should be set up in conjunction with
LK16.
If both Link Option A and Link Option B are inserted, the AD780 provides the reference voltage for the AD7265/AD7266, which
is also output via J24.
LK14 This link option selects the source or destination of the reference voltage applied to or received from the D
CAP
B pin of the
AD7265/AD7266.
In Position A, an external reference signal can be applied to the D
CAP
B pin via J25, or the internal reference voltage from the
AD7265/AD7266 can be accessed via J25. This link should be used in conjunction with LK19, which determines whether an
internal or external reference is used with the device.
In Position B, the AD780 provides an external 2.5 V reference to the D
CAP
B pin. This link should be set up in conjunction with LK16.
If both Link Option A and Link Option B are inserted, the AD780 provides the reference voltage, which is output via J25.
LK15 This link option selects the source of the AV
DD
and DV
DD
supply for the AD7265/AD7266.
In Position A, V
DD
(+5 V) is supplied from the EVAL-CED1Z.
In Position B, the V
DD
voltage must be supplied from an external source via J2.