Datasheet

Data Sheet AD7091
Rev. A | Page 3 of 20
SPECIFICATIONS
V
DD
= 2.09 V to 5.25 V, f
SAMPLE
= 1 MSPS, f
SCLK
= 50 MHz, T
A
= −40°C to +125°C, unless otherwise noted.
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE
1
f
IN
= 10 kHz sine wave
Signal-to-Noise Ratio (SNR)
2
V
DD
< 2.7 V 68 dB
V
DD
≥ 2.7 V 67 69 dB
Signal-to-Noise-and-Distortion Ratio
(SINAD)
2
66.3 68 dB
Total Harmonic Distortion (THD)
2
−86
−74
dB
Spurious-Free Dynamic Range (SFDR)
2
−85
−75
dB
Aperture Delay
2
5 ns
Aperture Jitter
2
40 ps
Full Power Bandwidth
2
At −3 dB 1.5 MHz
At −0.1 dB 1.2 MHz
DC ACCURACY
Resolution 12 Bits
Integral Nonlinearity (INL)
2
±0.6 ±1 LSB
Differential Nonlinearity (DNL)
2
Guaranteed no missing codes to 12 bits ±0.3 ±0.9 LSB
Offset Error
2
−8.5 ±0.7 +5 LSB
Gain Error
2
±1.2 ±4 LSB
Total Unadjusted Error (TUE)
2
1.1 LSB
ANALOG INPUT
Input Voltage Range 0 V
DD
V
DC Leakage Current ±1 µA
Input Capacitance
3
During acquisition phase 7 pF
Outside acquisition phase 1 pF
LOGIC INPUTS
Input High Voltage (V
INH
) 0.7 × V
DD
V
Input Low Voltage (V
INL
) 0.3 × V
DD
V
Input Current (I
IN
)
Typically 10 nA, V
IN
= 0 V or V
DD
±1
µA
Input Capacitance (C
IN
)
3
5 pF
LOGIC OUTPUTS
Output High Voltage (V
OH
) I
SOURCE
= 200 µA V
DD
− 0.2 V
Output Low Voltage (V
OL
) I
SINK
= 200 µA 0.4 V
Floating State Leakage Current ±1 µA
Floating State Output Capacitance
3
5 pF
Output Coding Straight binary
CONVERSION RATE
Conversion Time 650 ns
Track-and-Hold Acquisition Time
2, 3
Full-scale step input 350 ns
Throughput Rate
1
MSPS
POWER REQUIREMENTS
V
DD
2.09 5.25 V
I
DD
V
IN
= 0 V
Normal Mode—Static
4
V
DD
= 5.25 V 9.3 27 µA
V
DD
= 3 V 9.1 28 µA
Normal Mode—Operational V
DD
= 5.25 V, f
SAMPLE
= 1 MSPS 450 554 µA
V
DD
= 3 V, f
SAMPLE
= 1 MSPS 367 442 µA
V
DD
= 3 V, f
SAMPLE
= 100 kSPS 45 µA
Power-Down Mode V
DD
= 5.25 V 0.374 8.2 µA
V
DD
= 3 V 0.324 8 µA
V
DD
= 3 V, T
A
= −40°C to +85°C 0.324 1.8 µA