Datasheet

AD5750/AD5750-1
Rev. C | Page 7 of 36
Parameter
1
Min Typ Max Unit Test Conditions/Comments
DIGITAL INPUT JEDEC compliant
Input High Voltage, V
IH
2 V
Input Low Voltage, V
IL
0.8 V
Input Current −1 +1 μA Per pin
Pin Capacitance 5 pF Per pin
DIGITAL OUTPUTS
3
FAULT, IFAULT, TEMP, VFAULT
Output Low Voltage, V
OL
0.4 V 10 kΩ pull-up resistor to DVCC
0.6 V @ 2.5 mA
Output High Voltage, V
OH
3.6 V 10 kΩ pull-up resistor to DVCC
SDO
Output Low Voltage, V
OL
0.5 0.5 V Sinking 200 μA
Output High Voltage, V
OH
DVCC − 0.5 DVCC − 0.5 V Sourcing 200 μA
High Impedance Output
Capacitance
3 pF
High Impedance Leakage Current −1 +1 μA
POWER REQUIREMENTS
AV
DD
12 24 V ±10%
AV
SS
−12 −24 V ±10%
DV
CC
Input Voltage 2.7 5.5 V
AI
DD
4.4 5.6 mA
Output unloaded, output disabled,
R3, R2, R1, R0 = 0, 1, 0, 1, RSET = 0
5.2 6.2 mA Current output enabled
5.2 6.2 mA Voltage output enabled
AI
SS
2.0 2.5 mA
Output unloaded, output disabled,
R3, R2, R1, R0 = 0, 1, 0, 1, RSET = 0
2.5 3 mA Current output enabled
2.5 3 mA Voltage output enabled
DI
CC
0.3 1 mA V
IH
= DVCC, V
IL
= GND
Power Dissipation 108 mW
AVDD/AVSS = ±24 V, outputs
unloaded
1
Temperature range: −40°C to +105°C; typical at +25°C.
2
Specification includes gain and offset errors over temperature, and drift after 1000 hours, T
A
= 125°C
3
Guaranteed by characterization, but not production tested.