Datasheet

AD5750/AD5750-1
Rev. C | Page 3 of 36
FUNCTIONAL BLOCK DIAGRAM
CLEAR
VSENSE+
VOUT
VSENSE–
REXT1
IOUT
DVCC GND
A
VDD GND COMP1 COMP2
AD2/R1* AD1/R2* AD0/R3* AVSS
CLRSEL
HW SELECT
VIN
VREF
SCLK/OUTEN*
SDIN/R0*
SYNC/RSET*
SDO/VFAULT*
INPUT SHIFT
REGISTER
AND
CONTROL
LOGIC
STATUS
REGISTER
VOUT RANGE
SCALING
IOUT RANGE
SCALING
VOUT
SHORT FAULT
POWER-
ON RESET
FAULT/TEMP*
NC/IFAULT*
OVERTEMP
VOUT SHORT FAULT
IOUT OPEN FAULT
RESET
R
SET
Vx**
V
SS
V
DD
R2 R3
REXT2
IOUT
OPEN FAULT
AD5750/AD5750-1
*DENOTES SHARED PIN. SOFTWARE MODE DENOTED BY REGULAR TEXT, HARDWARE MODE
DENOTED BY ITALIC TEXT. FOR EXAMPLE, FOR FAULT/TEMP PIN, IN SOFTWARE MODE, THIS
PIN TAKES ON FAULT FUNCTION. IN HARDWARE MODE, THIS PIN TAKES ON TEMP FUNCTION.
** Vx IS AN INTERNAL BIAS VOLTAGE (CAN BE GROUND OR OTHER VOLTAGE) THAT IS USED
TO GENERATE THE INTERNAL SENSE CURRENTS NEEDED FOR THE CURRENT OUTPUTS.
07268-001
Figure 1.