Datasheet

UG-384 Evaluation Board User Guide
Rev. 0 | Page 6 of 12
EVALUATION BOARD SCHEMATICS AND ARTWORK
AVDD
AGND
VSS
1
VSS
2
VDD
3
CLR
4
LDAC
5
SYNC
6
SCLK
7
DIN
8
SDO
9
DGND
10
PD
11
AGND
12
AGNDS
13
VOUT
14
REFGND
15
REFIN
16
REFGND
U1
AD5570
R1
C1
VOUT
J5-1
J5-3
J5-2
+
C34
10uF
C35
0.1uF
SCLK
SDO
/LDAC
2
+VIN
5
TRIM
6
VOUT
4
GND
U2
ADR425ARZ
LK1
LK2
VREF
LK3
REFIN
VOUT'
SDI
/CLR
/SYNC
/PD
C16
0.1uF
+
C6
10uF
C7
0.1uF
+
C8
10uF
C9
0.1uF
3
+
2
-
4
V-
7
V+
6
U5
AD8675ARZ
C4
0.1uF
C5
0.1uF
C10
0.1uF
C11
0.1uF
C12
0.1uF
AVDD
AVDD
VSS
VSS
AVDD
VSS
AVDD
/PD
SDO
SDI
SCLK
/SYNC
/LDAC
/CLR
10579-004
Figure 4. Schematic of the AD5570 Circuitry
VIN: USE THIS PIN TO POWER THE SDP REQUIRES 5V 200MA
VIO: USE TO SET IO VOLTAGE MAX DRAW 20MA
BOARD ID EEPROM (24LC32) MUST BE ON I2C BUS 0,
I2C BUS 1 IS COMMON ACROSS BOTH CONNECTORS ON SDP - PULL UP RESISTORS REQUIRED
BMODE1: PULL UP WITH A 10K RESISTOR TO SET SDP TO BOOT FROM A SPI FLASH ON THE DAUGHTER BOARD
(CONNECTED TO BLACKFIN GPIO - USE I2C_0 FIRST)
MAIN I2C BUS (CONNECTED TO BLACKFIN TWI - PULL UP RESISTORS NOT REQUIRED)
CONNECTOR
STANDARD
SDP
PARALLEL
PORT
SPORT
SPI
I2C
GENERAL
INPUT/OUTPUT
TIMERS
*
*
*
*
*
*
*
*
*
*
*
*
*
*NC ON BLACKFIN SDP
120
NC
119
NC
118
GND
117
GND
116
VIO(+3.3V)
115
GND
114
PAR_D22
113
PAR_D20
112
PAR_D18
111
PAR_D16
110
PAR_D15
109
GND
108
PAR_D12
107
PAR_D10
106
PAR_D8
105
PAR_D6
104
GND
103
PAR_D4
102
PAR_D2
101
PAR_D0
100
PAR_WR
99
PAR_INT
98
GND
97
PAR_A2
96
PAR_A0
95
PAR_FS2
94
PAR_CLK
93
GND
92
SPORT_RSCLK
91
SPORT_DR0
90
SPORT_RFS
89
SPORT_TFS
88
SPORT_DT0
87
SPORT_TSCLK
86
GND
85
SPI_SEL_A
84
SPI_MOSI
83
SPI_MISO
82
SPI_CLK
81
GND
80
SDA_0
79
SCL_0
78
GPIO1
77
GPIO3
76
GPIO5
75
GND
74
GPIO7
73
TMR_B
72
TMR_D
71
NC
70
NC
69
GND
68
NC
67
NC
66
NC
65
NC
64
NC
63
GND
62
UART_TX
61
BMODE1
60
RESET_IN
59
UART_RX
58
GND
57
NC
56
EEPROM_A0
55
NC
54
NC
53
NC
52
GND
51
NC
50
NC
49
TMR_C
48
TMR_A
47
GPIO6
46
GND
45
GPIO4
44
GPIO2
43
GPIO0
42
SCL_1
41
SDA_1
40
GND
39
SPI_SEL1/SPI_SS
38
SPI_SEL_C
37
SPI_SEL_B
36
GND
35
SPORT_INT
34
SPORT_DT3
33
SPORT_DT2
32
SPORT_DT1
31
SPORT_DR1
30
SPORT_DR2
29
SPORT_DR3
28
GND
27
PAR_FS1
26
PAR_FS3
25
PAR_A1
24
PAR_A3
23
GND
22
PAR_CS
21
PAR_RD
20
PAR_D1
19
PAR_D3
18
PAR_D5
17
GND
16
PAR_D7
15
PAR_D9
14
PAR_D11
13
PAR_D13
12
PAR_D14
11
GND
10
PAR_D17
9
PAR_D19
8
PAR_D21
7
PAR_D23
6
GND
5
USB_VBUS
4
GND
3
GND
2
NC
1
VIN
J1
R5
DNP
R4
100K
USB_VBUS
R2
100K
R3
100K
1
A0
2
A1
3
A2
4
VSS
8
VCC
7
WP
6
SCL
5
SDA
U4
24LC32A-I/MS
3.3V
SCL_0
SDA_0
3.3V
/SYNC
SCLK
SDO
SDI
/LDAC /CLR
/PD
3.3V
10579-005
Figure 5. Schematic of the SDP Board Connector