Datasheet

Data Sheet AD5560
Rev. D | Page 53 of 68
Address Default Data Bits, MSB First
0x7 0x0000
Bit Name Function
24
Force amplifier
NPNs
1A-1
25 1A-2
26
2A (similar location to VPTAT high for EXTFORCE2
range)
27
1B-1 (similar location to VPTAT high for EXTFORCE1
range)
28
1B-2
29 2B
30 1C-1
31 1C-2
6
5
Test Force
AMP[1:0]
These register bits allow disabling of stages of the force amplifier. They can be used to ensure connectivity in
each parallel stage. The enabled stage depends also on which current range is selected.
Current Range
Test Force
Amplifier Enabled Stage
EXTFORCE1 0 All stages
EXTFORCE1 1 EXTFORCE1C
EXTFORCE1 2 EXTFORCE1B
EXTFORCE1 3 EXTFORCE1A
EXTFORCE2 0 All stages
EXTFORCE2 1 Reserved
EXTFORCE2
2
EXTFORCE2B
EXTFORCE2
3
EXTFORCE2A
4:0 Reserved Set to 0.