Datasheet
AD5560 Data Sheet
Rev. D | Page 46 of 68
CONTROL REGISTERS
DPS AND DAC ADDRESSING
The serial word assignment consists of 24 bits, as shown in
Table 16. All write-to registers can be read back. There are
some read-only registers (Address 0x43 and Address 0x44).
DAC x2 registers are not available for readback.
A no operation (NOP) command performs no function within
the device. This code may be useful when performing a
readback function where a change of DAC or DPS register is
not required.
Table 16. Serial Word Assignment
B23 [B22:B16] [B15:B0]
R/
W
Address bits
Data bits
Table 17. Read or Write Register Addressing
Address Register Default Data Bits, MSB First
0x0 NOP 0x0000 NOP command; performs no operation.
0x1 System
control
register
0x0000
Bit Name Function
15
14
TMP[1:0] Thermal shutdown bits. TMP1, TMP0 allow the user to program the thermal
shutdown temperature of operation.
TMP Action
0 Shutdown at a T
J
of 130°C (power-on default)
1 Shutdown at a T
J
of 120°C
2 Shutdown at a T
J
of 110°C
3
Shutdown at a T
J
of 100°C
13
12
Gain[1:0] MEASOUT output range. The MEASOUT range defaults to the voltage force span for
voltage and current measurements (this is ±12.81 V), which includes some overrange
to allow for error correction. The MEASOUT range can be reduced by using the gain
bits. This allows for use of asymmetrical supplies or for use of a smaller input range ADC.
MEASOUT gain settings do not translate the low voltage temperature sensor signal
(TSENSE).
Gain MEASOUT Gain MI Gain
0 1 20
1 1 10
2 0.2 20
3 0.2 10
To allow for system error correction, there is an additional gain of 0.125 for the force
function if this error correction is used as intended; then the output range on
MEASOUT scales accordingly (see Table 9).
11 FINGND Writing a 1 to FINGND switches the positive input of the force amplifier to GND; when
0, the input of the force amplifier is connected to the output of the force DAC.
10 CPO Write a 1 to the CPO bit to enable a simple window comparator function. In this
mode, only one comparator output is available (CPOH/CPO). This provides two bits of
information. The compared value is either inside or outside the window and enables
the user to bring only one line back to the controller per DPS device.
9
PD
This bit powers down the force amplifier block. Note that the amplifier must be
powered up but inhibited (
SW-INH
or
HW_INH
), to meet leakage specifications. A 0
powers this block down (default).
8
7
LOAD
Updates to registers listed in the following
LOAD
function column do not occur until
the active
LOAD
pin is brought low (or in the case of
LOAD
3, until
BUSY
goes high).
LOAD
LOAD
Function
0 Default operation, CLEN and
HW_INH
function normally.
1 The CLEN pin is a
LOAD
input.
2 The
HW_INH
pin is a
LOAD
input.
3 The device senses the
BUSY
open-drain pin and doesn't update until that
goes high. No
LOAD
hardware pin. CLEN and
HW_INH
function normally.
6:0 Unused Set to 0.