Datasheet

AD5560 Data Sheet
Rev. D | Page 4 of 68
FUNCTIONAL BLOCK DIAGRAM
R
Z
: 500Ω
TO 1.6MΩ
R
P
: 200Ω
TO 1MΩ
100kΩ
25kΩ
6kΩ
GPORESET
AV
SS
AV
DD
HW_INH/LOAD
DGND CLALM
TMPALM
VREF
DV
CC
REFGND
AGND
CLEN/
LOAD
8pF
RCLK
KELALM
SW16
GUARD AMP
×1 REG
C REG
M REG
16 16 16
16
×1
16-BIT
CLAMP
CONTROL
DAC
OFFSET
CLH
×2 REG
×1 REG
C REG
M REG
16 16 16
16
×1
16-BIT
DAC
OFFSET
OFFSET
CLH
×2 REG
16 16 16
16
16-BIT
DAC
OFFSET
CPH
×2 REG
16
16
×8 ×8
16-BIT
DAC
OSD DAC
DGS DAC
AD5560
OFFSET
DIAGNOSTIC B DIAGNOSTIC A DUTGND SENSE TSENSE
MUX
AND
GAIN
×1/×0.2
CPL
SW3
SW2
SW1
A B
×2 REG
×1 REG
C REG
M REG
16 16 16 16
16
×1
16-BIT
DAC
FIN
R3
×2 REG
RAMP REG
MUX
g
m
16-BIT
CLH DAC
CLH
OFFSET DAC
R4
R1
AGND
S/W INH
THERMAL SHUTDOWN
R2
×1 REG
C REG
M REG
16 16 16
×1 REG
C REG
M REG
KSENSE VSENSE ISENSE
CPOH/
CPO
CPOL
MEASOUT
POWER-ON
RESET
DIE TEMP
SENSOR AND
THERMAL
SHUTDOWN
OPEN
SENSE
DETECT
SW7
SW13 SW14 SW15
SW17
SW18
SERIAL SPI INTERFACE
SCLK SYNC
SDI
BUSY
SDO
–
–
–
–
+
+
–
+
–
+
+
+
×10
OR ×20
×1
AGND
V
SENSE
I
SENSE
DAC MID CODE
VOLTAGE TO
CENTER I
RANGE
LOCAL FEEDBACK EXTFORCE1 EXTFORCE2
VREF
VREF
A
C
B
A
C
B
16
16
ALARM BLOCK
KSENSE
DUTGND SENSE
GUARD
DUTGND SENSE
AND ALARM
SW5a
40µA/V
80µA/V
400µA/V
1000µA/V
INHIBIT
SLEW RATE
CONTROL
HCAV
DD
1x
C
C0
C
C1
C
C2
C
C3
HCAV
DD
2x
SENSE
EXTFORCE1
UP TO ±1.2A
UP TO ±500mA
EXTFORCE2 SLAVE_IN MASTER_OUT
C
F0
TO C
F4
C
F0
TO C
F4
DUT
07779-001
EXTMEASIH1
SYS_SENSE
SYS_FORCE
SW8 SW9
EXTMEASIH2
EXTMEASIL
EXT R
SENSE
1
EXT R
SENSE
2
DUTGND
GUARD/ SYS_DUTGND
SW6
SW5b
SW11
10kΩ
HCAV
SS
1x HCAV
SS
2x
100kΩ
20kΩ
2kΩ
200Ω
20Ω
2.5mA
250µA
25µA
5µA
25mA
R
SENSE
FORCE
SW4
Figure 1.