Datasheet

AD5560 Data Sheet
Rev. D | Page 38 of 68
stability problems. This is most likely to be the case when there
are both a large C
R
and large R
C
.
The R
P
resistor is intended to solve this problem. Again, it is
prudent not to cancel exact pole/zero cancellation with R
Z
and
instead allow the zero to be 2× to 3× the frequency of the pole.
It is best to be very conservative when using R
Z
to cancel the
load pole. Choose a high zero frequency to avoid flat spots in
the gain curve that extend bandwidth, and be conservative when
choosing R
P
to create a pole. Aim to place the R
Z
zero at 5× the
exact cancellation frequency and the R
P
pole at around 2× the
exact cancellation frequency. The best solution here is to avoid
this complexity by using a high quality capacitor with low ESR.
COMPENSATION STRATEGIES
Ensuring Stability into an Unknown Capacitor Up to a
Maximum Value
If the AD5560 has to be stable in a range of load capacitance
from no load capacitance to an upper limit, then select manual
compensation mode and, in Compensation Register 2, set the
parameters according to the maximum load capacitance listed
in Table 14.
Table 14. Suggested Compensation Settings for Load Capa-
citance Range of Unknown Value to Some Maximum Value
Capacitor
g
m[1:0]
R
P[2:0]
R
Z[2:0]
C
C[3:1]
C
F[2:0]
Min Max
0 0.22 μF 2 0 0 000 2
0 2.2 μF 2 0 0 001 3
0 10 μF 2 0 0 010 4
0 20 μF 2 0 0 011 4
0 160 μF 2 0 0 111 4
Table 14 assumes that the C
Cx
and C
Fx
capacitor values are those
suggested in Table 8.
Making a circuit stable over a range of load capacitances for
no load capacitance or greater means that the circuit is over-
compensated for small load capacitances, undercompensated
for high load capacitances, or both. The previous choice settings,
along with the suggested capacitor values, is a compromise
between both. By compromising phase margin into the largest
load capacitors, the system bandwidth can be increased, which
means better performance under load current transient condi-
tions. The disadvantage is that there is more overshoot during a
large DAC step. To reduce this at the expense of settling time, it
may be desirable to temporarily switch a capacitor range 5× or
10× larger before making a large DAC step.
OPTIMIZING PERFORMANCE FOR A KNOWN
CAPACITOR USING AUTOCOMPENSATION MODE
The autocompensation mode decides what values of g
mx
, C
Cx
C
Fx
, R
Z
, and R
P
should be chosen for good performance in a
particular capacitor. Both the capacitance and its ESR need to
be known. To avoid creating an oscillator, the capacitance should
not be overestimated and the ESR should not be underesti-
mated. Use the following steps to determine compensation
settings when using the manual compensation register (this
algorithm is what the autocompensation method is based upon):
1. Use C
R
(the load capacitance with a series ESR) and R
C
(the
ESR of that load capacitance) as inputs.
2. Assume that C
R
has not been overestimated and that R
C
has
not been underestimated. (Although, when the ESR R
C
is
shown to have a frequency dependence, the lowest R
C
that
occurs near the resonant frequency is probably a better
guide. However, do not underestimate this ESR).
a. C
C0
is the suggested 100 pF.
b. C
Fx
capacitor values are as suggested, and they extend
up to 2.2 µF (C
F4
). For faster settling into small
capacitive loads, include smaller C
Fx
values such as C
F3
and C
F2
. If a capacitor is not included, then short the
corresponding C
Fx
pin to one that is.
c. There is approximately 1 Ω of parasitic resistance, R
C
,
from the AD5560 to the DUT (for example, the cable);
R
C
= 1 Ω.
3. Select g
m[1:0]
= 2, C
C[3:1]
= 000. This makes the input stage of
the force amplifier; have g
mx
= 300 µA/V; deselect the
compensation capacitors, C
C1
, C
C2
, C
C3,
so that only C
C0
is
active.
4. Choose a C
F[2:0]
value from 0 to 4 to select the largest C
Fx
capacitor that is smaller than C
R
.
5. If C
R
< 100 nF, then set R
Z[2:0]
= 0, R
P[2:0]
= 0. This ends the
algorithm.
6. Calculate R
0
, the resistive impedance to the DUT, using the
following steps:
a. Calculate R
S
, the sense resistor, from the selected
current range using R
S
= 0.5 V/I
RANGE
.
b. Calculate R
F
, the output impedance, through the C
Fx
capacitor, by using
R
F
= 1.2 Ω + (ESR of C
Fx
capacitor)
c. Calculate R
FM
, a modified version of R
F
, which takes
account of frequency dependent peaking, through the
C
Fx
buffers into a large capacitive load, by using
R
FM
= R
F
/(1 + [2 × (C
Fx
/2.2 μF)])
That is, R
FM
is up to 3× smaller than R
F
, when the
selected C
Fx
capacitor is large compared to 2.2 μF.
Then calculate
R
0
= R
C
+ (R
S
||R
FM
)
where R
C
takes its value from the assumptions in Step 2.
7. If R
C
> (R
0
/5), then the ESR is large enough to make the
DUT look resistive. Choose R
Z[2:0]
= 0, R
P[2:0]
= 0. This ends
the algorithm
8. Calculate the unity gain frequency (Fug), the ideal unity
gain frequency of the force amplifier, from Fug =
g
mx
/2πC
C0
. Using the previously suggested values (g
m[1:0]
= 2
gives g
mx
= 300 µA/V and C
C0
= 100 pF), Fug calculates to
480 kHz.
9. Calculate F
P
, the load pole frequency, using F
P
=
1/(2πR
0
C
C0
).