Datasheet
AD5560 Data Sheet
Rev. D | Page 36 of 68
FORCE AMPLIFIER STABILITY
There are three modes for configuring the force amplifier: safe
mode, autocompensation mode, and manual compensation mode.
Manual compensation mode has highest priority, followed by safe
mode, then autocompensation mode.
Safe Mode
Selected through Compensation Register 1 (see Table 20), this
mode guarantees stability of the force amplifier under all
conditions. Where the load is unknown, this mode is useful but
results in a slow response. This is the power-on default of the
AD5560.
Autocompensation Mode
Using this mode, the user inputs the C
R
and ESR values, and
the AD5560 decides the most appropriate compensation
scheme for these load conditions. The compensation chosen
is for an optimum tradeoff between ac response and stability.
Manual Compensation Mode
This mode allows access to all of the internal programmable
parameters to configure poles/zeros, which affect the dynamic
performance of the loop. These variables are outlined in
Table 12 and Table 13.
Figure 57 shows more details of the force amplifier block.
Table 12. External Variables
Name Description Min Max
C
R
DUT capacitance with contributing
ESR
10 nF 160 µF
R
C
ESR in series with C
R
1 mΩ 10 Ω
C
D
DUT capacitance with negligible ESR 100 pF 10 nF
R
D
Loading resistance at the DUT ~2 Ω Infinity
I
R
Current range ±5 A ±1.2 A
Table 13. Internal Variables
Name Description Min Max
R
Z
Resistor in series with C
C0
, which
contributes a zero.
500 Ω 1.6 MΩ
R
P
Resistor to 8 pF to contribute an
additional pole
200 Ω 1 MΩ
C
C0
:C
C3
Capacitors to ensure
unconditional stability
100 pF 100 nF
C
F0
:C
F4
Capacitors to optimize ac
performance into different C
R
, C
D
4.7 nF 10 F
g
mx
Transconductance of force
amplifier input stage
40 A/V 900 A/V
DUTGND
FORCE
SENSE
V
SENSE
–
–
+
+
×1
C
F0
4.7nF
R
Z
:
500Ω TO
1.6MΩ
C
F1
22nF
C
F2
100nF
C
F3
470nF
C
F4
2.2µF
R
SENSE
2
R
SENSE
1
AD5560
FORCE VOLTAGE LOOP
EXTFORCE1
EXTFORCE2
100kΩ25kΩ
20Ω
200Ω
2kΩ
20kΩ
100kΩ
6kΩ
100pF 100pF 330pF 3.3nF
C
C0
C
C1
C
C2
C
C3
FORCE
DAC
g
m
R
P
:
200Ω TO 1MΩ
8pF
AGND
+
–
+
–
C
D
C
R
R
D
R
C
07779-010
Figure 57. Block Diagram of a Force Amplifier Loop