Datasheet
AD5522 Data Sheet
Rev. E | Page 16 of 64
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
PIN 1
AD5522
TOP VIEW
EXPOSED PAD ON BOTTOM
(Not to Scale)
1
AVDD
2
CFF0
3
CCOMP0
4
EXTMEASIH0
5
EXTMEASIL0
6
FOH0
7
GUARD0
8
GUARDIN0/DUTGND0
9
MEASVH0
10
AGND
11
AGND
12
MEASVH2
13
GUARDIN2/DUTGND2
14
GUARD2
15
FOH2
16
EXTMEASIL2
17
EXTMEASIH2
18
CCOMP2
19
CFF2
20
AVDD
21
EXTFOH2
22
AVSS
23
BUSY
24
SCLK
25
CPOL0/SCLK
26
CPOH0/SDI
27
SDI
28
SYNC
29
CPOL1/SYNC
30
DGND
31
CPOH1/SDO
SDO
32 33
LOAD
34
DVCC
35
CPOL2/CPO0
36
CPOH2/CPO1
37
CPOL3/CPO2
38
CPOH3/CPO3
39
AVSS
40
EXTFOH3
61
EXTFOH1
62
AVSS
63
MEASOUT3
64
MEASOUT2
65
MEASOUT1
66
MEASOUT0
67
AVSS
68
SYS_FORCE
69
AGND
70
SYS_SENSE
71
REFGND
72
VREF
73
DUTGND
74
AVDD
75
SPI/LVDS
76
CGALM
77
TMPALM
78
RESET
79
AVSS
80
EXTFOH0
41
AVDD
42
CFF3
43
CCOMP3
44
EXTMEASIH3
45
EXTMEASIL3
46
FOH3
47
GUARD3
48
GUARDIN3/DUTGND3
49
MEASVH3
50
AGND
51
AGND
52
MEASVH1
53
GUARDIN1/DUTGND1
54
GUARD1
55
FOH1
56
EXTMEASIL1
57
EXTMEASIH1
58
CCOMP1
59
CFF1
60
AVDD
06197-008
NOTES
1. THE EXPOSED PAD IS INTERNALLY ELECTRICALLY CONNECTED TO AVSS. FOR ENHANCED THERMAL, ELECTRICAL,
AND BOARD LEVEL PERFORMANCE, THE EXPOSED PADDLE ON THE BOTTOM OF THE PACKAGE SHOULD BE SOLDERED
TO A CORRESPONDING THERMAL LAND PADDLE ON THE PCB.
Figure 8. Pin Configuration, Exposed Pad on Bottom
Table 6. Pin Function Descriptions
Pin No. Mnemonic Description
Exposed pad The exposed pad is internally electrically connected to AVSS. For enhanced thermal, electrical, and board level
performance, the exposed paddle on the bottom of the package should be soldered to a corresponding
thermal land paddle on the PCB.
1, 20, 41,
60, 74
AVDD Positive Analog Supply Voltage.
2 CFF0 External Capacitor for Channel 0. This pin optimizes the stability and settling time performance of the force
amplifier when in force voltage mode. See the Compensation Capacitors section.
3 CCOMP0 Compensation Capacitor Input for Channel 0. See the Compensation Capacitors section.
4 EXTMEASIH0 Sense Input (High Sense) for High Current Range (Channel 0).
5 EXTMEASIL0 Sense Input (Low Sense) for High Current Range (Channel 0).
6
FOH0
Force Output for Internal Current Ranges (Channel 0).
7 GUARD0 Guard Output Drive for Channel 0.
8 GUARDIN0/
DUTGND0
Guard Amplifier Input for Channel 0/DUTGND Input for Channel 0. This dual function pin is configured via the
serial interface. The default function at power-on is GUARDIN0. If this pin is configured as a DUTGND input for
the channel, the input to the guard amplifier is internally connected to MEASVH0. For more information, see
the Device Under Test Ground (DUTGND) section and the Guard Amplifier section.
9 MEASVH0 DUT Voltage Sense Input (High Sense) for Channel 0.
10, 11, 50,
51, 69
AGND Analog Ground. These pins are the reference points for the analog supplies and the measure circuitry.
12 MEASVH2 DUT Voltage Sense Input (High Sense) for Channel 2.