Datasheet

AD5522 Data Sheet
Rev. E | Page 14 of 64
SCLK
SYNC
SDI
SDO
29
58
DB0
(N)
DB28
(N)
DB0
(N + 1)
DB0
(N + 1)
INPUT WORD SPECIFIES
REGISTER TO BE READ
UNDEFINED
NOP CONDITION
SELECTED REGISTER DATA
CLOCKED OUT
t
18
t
19
DB23/
DB28
(N + 1)
DB23/
DB28
(N + 1)
06197-006
Figure 6. SPI Read Timing (Readback Word Contains 24 Bits and Can Be Clocked Out with a Minimum of 24 Clock Edges)
SYNC
SYNC
SCLK
SDI
SDI
SCLK
MSB
D28
LSB
D0
t
3
t
1
t
4
t
2
t
7
t
6
t
5
t
8
SDO
LSB
D0
MSB
D23/D28
SELECTED REGISTER DATA CLOCKED OUT
UNDEFINED
MSB
DB23/
DB28
LSB
DB0
SDO
06197-007
Figure 7. LVDS Read and Write Timing (Readback Word Contains 24 Bits and Can Be Clocked Out with a Minimum of 24 Clock Edges)