Datasheet

AD5522 Data Sheet
Rev. E | Page 10 of 64
Parameter Min Typ
1
Max Unit Test Conditions/Comments
DIE TEMPERATURE SENSOR
Accuracy
2
±7 °C
Output Voltage at 25°C 1.5 V
Output Scale Factor
2
4.6 mV/°C
Output Voltage Range
2
0 3 V
INTERACTION AND CROSSTALK
2
DC Crosstalk (FOHx) 0.05 0.65 mV
DC change resulting from a dc change in any DAC
in the device, FV and FI modes, ±2 mA range,
C
LOAD
= 200 pF, R
LOAD
= 5.6 kΩ
DC Crosstalk (MEASOUTx) 0.05 0.65 mV
DC change resulting from a dc change in any DAC
in the device, MV and MI modes, ±2 mA range,
C
LOAD
= 200 pF, R
LOAD
= 5.6 kΩ
DC Crosstalk Within a Channel 0.05 mV
All channels in FVMI mode, one channel at midscale;
measure the current for one channel in the lowest
current range for a change in comparator or clamp
DAC levels for that PMU
SPI INTERFACE LOGIC INPUTS
Input High Voltage, V
IH
1.7/2.0 V
(2.3 V to 2.7 V)/(2.7 V to 5.25 V), JEDEC-compliant
input levels
Input Low Voltage, V
IL
0.7/0.8 V
(2.3 V to 2.7 V)/(2.7 V to 5.25 V), JEDEC-compliant
input levels
Input Current, I
INH
, I
INL
−1 +1 µA
Input Capacitance, C
IN
2
10 pF
CMOS LOGIC OUTPUTS SDO, CPOx
Output High Voltage, V
OH
DVCC − 0.4 V
Output Low Voltage, V
OL
0.4 V I
OL
= 500 µA
Tristate Leakage Current −2 +2 µA
SDO, CPOH1/
SDO
−1 +1 µA All other output pins
Output Capacitance
2
10
pF
OPEN-DRAIN LOGIC OUTPUTS
BUSY
,
TMPALM
,
CGALM
Output Low Voltage, V
OL
0.4 V I
OL
= 500 µA, C
LOAD
= 50 pF, R
PULLUP
= 1 kΩ
Output Capacitance
2
10 pF
LVDS INTERFACE LOGIC INPUTS
REDUCED RANGE LINK
2
Input Voltage Range 875 1575 mV
Input Differential Threshold −100 +100 mV
External Termination Resistance 80 100 120 Ω
Differential Input Voltage 100 mV
LVDS INTERFACE LOGIC OUTPUTS
REDUCED RANGE LINK
Output Offset Voltage 1200 mV
Output Differential Voltage
400
mV
POWER SUPPLIES
AVDD 10 28 V |AVDD − AVSS| ≤ 33 V
AVSS −23 −5 V
DVCC 2.3 5.25 V
AI
DD
26 mA
Internal ranges (±5 μA to ±2 mA), excluding load
conditions; comparators and guard disabled
AI
SS
−26 mA
Internal ranges (±5 μA to ±2 mA), excluding load
conditions; comparators and guard disabled
AI
DD
28
mA
Internal ranges (±5 μA to ±2 mA), excluding load
conditions; comparators and guard enabled
AI
SS
−28 mA
Internal ranges (±5 μA to ±2 mA), excluding load
conditions; comparators and guard enabled
AI
DD
36 mA External range, excluding load conditions
AI
SS
−36 mA External range, excluding load conditions
DI
CC
1.5 mA
Maximum Power Dissipation
2
7 W
Maximum power that should be dissipated in this
package under worst-case load conditions; careful
consideration should be given to supply selection
and thermal design