Datasheet

Data Sheet AD5424/AD5433/AD5445
Rev. D | Page 5 of 28
TIMING CHARACTERISTICS
All input signals are specified with tr = tf = 1 ns (10% to 90% of V
DD
) and timed from a voltage level of (V
IL
+ V
IH
)/2. V
DD
= 2.5 V to 5.5 V,
V
REF
= 10 V, I
OUT
2 = 0 V; temperature range for Y version: −40°C to +125°C; all specifications T
MIN
to T
MAX
, unless otherwise noted.
Table 2.
Parameter
1
V
DD
= 2.5 V to 5.5 V V
DD
= 4.5 V to 5.5 V Unit Test Conditions/Comments
t
1
0 0 ns min
R/
W
to
CS
setup time
t
2
0 0 ns min
R/
W
to
CS
hold time
t
3
10 10 ns min
CS
low time (write cycle)
t
4
6 6 ns min Data setup time
t
5
0 0 ns min Data hold time
t
6
5 5 ns min
R/
W
high to
CS
low
t
7
9 7 ns min
CS
min high time
t
8
20 10 ns typ Data access time
40 20 ns max
t
9
5 5 ns typ Bus relinquish time
10
10
ns max
1
Guaranteed by design, not subject to production test.
03160-002
CS
DATA
R/W
t
1
t
2
t
6
t
7
t
8
t
2
t
9
t
3
t
4
t
5
DATA VALID DATA VALID
Figure 2. Timing Diagram