Datasheet

AD5424/AD5433/AD5445 Data Sheet
Rev. D | Page 20 of 28
SINGLE-SUPPLY APPLICATIONS
Current Mode Operation
The current mode circuit in Figure 51 shows a typical circuit for
operation with a single 2.5 V to 5 V supply. I
OUT
2 and therefore
I
OUT
1 is biased positive by the amount applied to V
BIAS
. In this
configuration, the output voltage is given by
V
OUT
= [D × (R
FB
/R
DAC
) × (V
BIAS
− V
IN
)] + V
BIAS
As D varies from 0 to 255 (AD5424), 0 to 1023 (AD5433),
or 0 to 4095 (AD5445), the output voltage varies from
V
OUT
= V
BIAS
to V
OUT
= 2V
BIAS
− V
IN
V
BIAS
should be a low impedance source capable of sinking and
sourcing all possible variations in current at the I
OUT
2 terminal.
03160-051
ADDITIONAL PINS OMITTED FOR CLARITY
C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED
IF A1 IS A HIGH SPEED AMPLIFIER.
NOTES:
1.
2.
V
DD
V
DD
V
IN
V
REF
GND
DAC
C1
A1
R
FB
I
OUT
1
I
OUT
2
V
BIAS
V
OUT
Figure 51. Single-Supply Current Mode Operation
It is important to note that V
IN
is limited to low voltages because
the switches in the DAC ladder no longer have the same source-
drain drive voltage. As a result, there on resistance differs and
the linearity of the DAC degrades.
Voltage Switching Mode of Operation
Figure 52 shows these DACs operating in the voltage-switching
mode. The reference voltage, V
IN
, is applied to the I
OUT
1 pin,
I
OUT
2 is connected to AGND, and the output voltage is available
at the V
REF
terminal. In this configuration, a positive reference
voltage results in a positive output voltage, making single-supply
operation possible. The output from the DAC is a voltage at a
constant impedance (the DAC ladder resistance), thus an op
amp is necessary to buffer the output voltage. The reference
input no longer sees a constant input impedance, but one that
varies with code. Therefore, the voltage input should be driven
from a low impedance source.
03160-052
V
IN
V
DD
V
DD
V
REF
V
OUT
GND
DAC
R
FB
I
OUT
1
I
OUT
2
R1
A1
R2
ADDITIONAL PINS OMITTED FOR CLARITY
C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED
IF A1 IS A HIGH SPEED AMPLIFIER.
NOTES:
1.
2.
Figure 52. Single-Supply Voltage-Switching Mode Operation
It is important to note that V
IN
is limited to low voltages because
the switches in the DAC ladder no longer have the same source-
drain drive voltage. As a result, there on resistance differs, which
degrades the linearity of the DAC. See Figure 18 to Figure 23. Also,
V
IN
must not go negative by more than 0.3 V; otherwise, an internal
diode turns on, exceeding the maximum ratings of the device.
In this type of application, the full range of multiplying capability
of the DAC is lost.
POSITIVE OUTPUT VOLTAGE
Note that the output voltage polarity is opposite to the V
REF
polarity for dc reference voltages. To achieve a positive voltage
output, an applied negative reference to the input of the DAC is
preferred over the output inversion through an inverting amplifier
because of the resistor tolerance errors. To generate a negative
reference, the reference can be level-shifted by an op amp such
that the V
OUT
and GND pins of the reference become the virtual
ground and –2.5 V respectively, as shown in Figure 53.
V
DD
R
FB
I
OUT
1
I
OUT
2
C1
V
OUT
= 0V TO +2.5V
GND
V
DD
= 5V
V
REF
NOTES:
1
ADDITIONAL PINS OMITTED FOR CLARITY.
2
C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED,
IF A1 IS A HIGH SPEED AMPLIFIER.
ADR03
V
OUT
V
IN
GND
–5V
+5V
–
2.5V
03160-053
Figure 53. Positive Voltage Output with Minimum of Components