Datasheet

Evaluation Board User Guide UG-274
Rev. 0 | Page 11 of 16
09820-014
MUX - CS
LEVEL TRANSLATOR
TEST POINTS
SDP BOARD CONNECTOR AND EEPROM
EXTERNAL C
ONTROL CONNECTION
SPORT
UART SPI TIMERS
INPUT/OUTPUT
GENERAL
CONTROL
BLACKFIN
PORT
PARA
LLEL
FU
TURE USE
I2C
POWER SUPPLY
1
VIN_4-12V
2
N/C
3
GND
4
GND
5
5V_USB
6
GND
7
PAR_D23
8
PAR_D21
9
P
AR_D19
10
PAR_D17
11
GND
12
PAR_D14
13
PAR_D13
14
PAR_D11
15
PAR_D9
16
PAR_D7
1
7
GND
18
PAR_D5
19
PAR_D3
20
PAR_D1
21
PAR_RD
22
PAR_CS
23
GND
24
PAR_A3
25
PAR_A1
26
PAR_FS3
27
PAR_FS1
28
GND
29
SPORT_DR3
30
SPORT_DR2
31
SPORT_DR1
32
SPORT_DT1
33
SPORT_DT2
34
SPORT_DT3
35
SPORT_INT
36
GND
37
SPI_SEL_B
38
SPI_SEL_C
39
SPI_SEL1/_SS
40
GND
41
SDA_1
42
SCL_1
43
GPIO0
44
GPIO2
45
GPIO4
46
GND
47
GPIO6
48
TMR_A
49
TMR_C
50
FUTURE
51
FUTURE
52
GND
53
FUTURE
54
FUTURE
55
FUTURE
56
FUTURE
57
FUTURE
58
GND
59
UART_RX
60
RESET_IN
61
BMODE1
62
UART_TX
63
GND
64
FUTURE
65
FUTURE
66
FUTURE
67
FUTURE
68
FUTURE
69
GND
70
FUTURE
71
FUTURE
72
TMR_D
73
TMR_B
74
GPIO7
75
GND
76
GPIO5
77
GPIO3
78
GPIO1
79
SCL_0-EEPROM
80
SDA_0-EEPROM
81
GND
82
SPI_CLK
83
SPI_MISO
84
SPI_MOSI
85
SPI_SEL_A
86
GND
87
SPORT_TSCLK
88
SPORT_DTO
89
SPORT_TFS
90
SPORT_RFS
91
SPORT_DR0
92
SPORT_RSCLK
93
GND
94
PAR_CLK
95
PAR_FS2
96
PAR_A0
97
PAR_A2
98
GND
99
PAR_INT
100
PAR_WR
101
PAR_D0
102
PAR_D2
103
PAR_D4
104
GND
105
PAR_D6
106
PAR_D8
107
PAR_D10
108
PAR_D12
109
GND
110
PAR_D15
111
PAR_D16
112
PAR_D18
113
PAR_D20
114
PAR_D22
115
GND
116
V_IO(3.3V)
117
GND
118
GND
119
7V_UNREGOUT
120
7V_UNREGOUT
J22
BLACKFIN-DB_FEMALE_CONNECTOR_2
1
A0
2
A1
3
A2
4
VSS
5
SDA
6
SCL
7
WP
8
VCC
U25
24LC01
D6
LED
R37
1K
DGND
AGND
4
S8
5
S6
11
A0
10
A1
6
EN
9
A2
1
S5
14
S2
2
S7
12
S4
13
S1
3
D
7
VSS
8
GND
15
S3
16
VDD
A22
ADG658
35
A0
36
A1
37
A2
38
A3
39
A4
40
A5
1
A6
2
A7
3
A8
4
A9
5
A10
6
A11
7
A12
8
A13
9
A14
10
A15
30
B0
29
B1
28
B2
27
B3
26
B4
25
B5
24
B6
23
B7
22
B8
21
B9
20
B10
19
B11
18
B12
17
B13
16
B14
15
B15
32
BE2
31
BE1
34
SEL
11
GND
33
VCC
U13
ADG3247-CSP
MUX-A0|CS
MUX-A2|U/D
SCLK_BF
DIN_BF
MUX-A1|DACSEL
RDY|MODE
CLK
SDO_BF
SYNC_BF
SDA_BF
SHDN_BF
SCL_BF
RESET_BF
WP_BF
+3V3
VDD
+5V
VSS
A23
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A16
A17
A18
R2
2k2
R1
2k2
DIN_BF
SDO_BF
SCLK_BF
SYNC_BF
RDY|MODERESET_BF
WP_BF
SDA_BF
SCL_BF
SHDN_BF
+3.3V
+5V
+3.3V
MUX-A2|U/D
MUX-A1|DACSEL
MUX-A0|CS
MUX-A0|CS
MUX-A1|DACSEL
MUX-A2|U/D
SYNC-1
SYNC-2
SYNC-3
SYNC-4 SYNC-5
SYNC-6 SYNC-7
VDD
+3.3V
CLK_BF
SCLK_BF SCLK
DIN_BF DIN
SDO_BF SDO
SYNC_BF
SYNC
SYNC
RESET_BF
WP_BF
SHDN_BF
RDY_BF
RESET
WP
SHDN
RDY
SDA_BF
SCL_BF
SDA
SCL
MUX-A0|CS
MUX-A1|DACSEL
MUX-A2|U/D
RDY|MODE
CS
DACSEL
U/D
MODE
CLK_BF CLK
+5V
MUX-A0|CS
MUX-A1|DACSEL
MUX-A2|U/D
RDY|MODE
CLK_BF
SCLK_BF
DIN_BF
SDO_BF
SYNC_BF
SDA_BF
SCL_BF
SHDN_BF
RESET_BF
WP_BF
VDD VSS
+5V
+3.3V
+3.3V
Figure 14. Schematic of SDP Connector