Datasheet

Evaluation Board User Guide UG-469
Rev. 0 | Page 15 of 20
DAUGHTER BOARD
11006-018
VDD
VLOGIC
C4 C3
0.1uF10uF
0.1uF10uF
+
C2 C1
+
RESET
WP
LRDAC
DIS
INDEP
VDD
VSS
DGND
AGND
VLOGIC
VSS
VDD
DGND
VLOGICADDR0
BA
0
ADDR0
1 0 1
DGND
VLOGICADDR1
BA
ADDR1
W1
VDD
VSS
WP
RESET
LRDAC
SDA|DIN
SCL|SCLK
ADDR1|SDO
ADDR0|SYNC
GND
VLOGIC
DIS
B1
A1 W2
B2
A2 W3
B3
A3 W4
B4
A4
W1
B1
A1
W2
B2
A2
W3
B3
A3
W4
B4
A4
U1 AD5142
2 3 4 9
10 11
5 6 7
12 13 14
15 16 18 17 19 22 21 23 24 20 1 8
J1-1 J1-2 J1-3 J1-4 J1-5 J1-6 J1-8 J1-7
ADDR0 ADDR1 SDA
J3-1
J3-2
J3-3
J3-4
J3-5
J2-1 J2-3 J2-5 J2-7
J2-11
J2-9
J2-2 J2-4 J2-6 J2-8 J2-12 J2-10
A1 W1 B1 A2 B2 W2
A3
W3
B3 A4 B4
W4
J4-1
J4-2
J4-3
J4-4
J4-5
SCL SYNC SDO SCLK SDI
SDA|DIN
SDA DIN
SCL|SCLK
12
13 14 10 11 6 5 3 2 16
9 7 4 8
SCL SCLK
VLOGIC
ADDR1|SDO
ADDR0|SYNC
EN IN
1
A1
A B
15
ADDR1 SDO
S3B S3A S2B S2A S1B S1A
D4 D3 D2 D1
S4B S4A
DGND
GND VDD
U2
ADG774
DGND
DGND
VLOGIC
I2C SPI
DIS
ADDR0 SYNC
VSS
WP
RESET
LRDAC
SDA|DIN SCL|SCLK
ADDR1|SDO
ADDR0|SYNC
DGND
VLOGIC DIS
Figure 19. Schematic of Daughter Board