Datasheet

Evaluation Board User Guide UG-471
Rev. 0 | Page 15 of 20
DAUGHTER BOARD
A1
VDD
VDD
VDD
VLOGIC
SYNC
SDO
DIN
SCLK
VLOGIC
VLOGIC
C4 C3
0.1uF10uF
0.1uF10uF
+
C2 C1
+
SYNC SDO DIN SCLK
RESET
RESET
WP
LRDAC
DIS
INDEP
RESET
VSS
VSS
VSS
GND
DGND
DGND
AGND
VLOGIC
VSS
VDD
DGND
VLOGICA1
BA
9 10 14 13 12 11 16 5 1
W1
B1 A2 B2
INDEP
INDEP
INDEP
DEPEN
INDEP
W2
W1 B1 A2 W2
2
U1
A1 B2
AD5142
3 4 6 8
15
7
J1-1 J1-2 J1-3 J1-4 J1-5 J1-6 J1-8 J1-7
ADDR0 ADDR1 SDA
J3-1
J3-2
J3-3
J3-4
J3-5
J2-1 J2-3 J2-5 J2-7
J2-11
J2-9
J2-2 J2-4 J2-6 J2-8 J2-12 J2-10
A1 W1 B1 A2 B2 W2
A3
W3
B3 A4 B4
W4
J4-1
J4-2
J4-3
J4-4
J4-5
SCL SYNC SDO SCLK SDI
11008-015
Figure 17. Schematic of Daughter Board