Datasheet
EVAL-AD1940AZ Preliminary Technical Data
Rev. PrA | Page 22 of 30
DIGITAL AUDIO I/O
IN
OUT
Digital Header 1
Digital Header 1
AD1940 Input is Slave by Default
Set external source to LRCLK/BCLK Master
AD1940 Input Channels 0-7 in I2S Mode
Dual Wire 8-Channel TDM: Ch 0-7 on SDATA_IN3, Ch 8-15 on SDATA_IN2
Single Wire 16-Channel TDM: Ch 0-15 on SDATA_IN3
OUT
IN
Digital Header 2
Digital Header 2
AD1940 Output 0 can be Master or Slave
AD1940 Output Channels 0-7 in I2S Mode
Dual Wire 8-Channel TDM: Ch 0-7 on SDATA_OUT0
Single Wire 16-Channel TDM: Ch 0-15 on SDATA_OUT0
OUT
IN
Digital Header 3
Digital Header 3
AD1940 Output 1 can be Master or Slave
AD1940 Output Channels 8-15 in I2S Mode
Dual Wire 8-Channel TDM: Ch 8-15 on SDATA_OUT4
Single Wire 16-Channel TDM: No outputs on this header
1
3
5
7
9
2
4
6
8
10
11
13
15
17
19
12
14
16
18
20
J22
HEADER_20WAY_POL
5
B1
4
A1
6
O1
U2-B
74HC125
9
B3
10
A3
8
O3
U2-C
74HC125
1
2
3
SW3
Digital Header 1 MCLK Direction
R142
R143
R145
22r1
TP67
R146
R147
1
2
3
SW4
Digital Header 2 MCLK Direction
9
B3
10
A3
8
O3
U33-C
74HC125
5
B1
4
A1
6
O1
U33-B
74HC125
1
3
5
7
9
2
4
6
8
10
11
13
15
17
19
12
14
16
18
20
J23
HEADER_20WAY_POL
R148
22r1
TP68
R149
R150
1
2
3
SW5
Digital Header 3 MCLK Direction
2
B0
1
A0
3
O0
U33-A
74HC125
12
B2
13
A2
11
O2
U33-D
74HC125
1
3
5
7
9
2
4
6
8
10
11
13
15
17
19
12
14
16
18
20
J24
HEADER_20WAY_POL
R151
22r1
TP69
12
B2
13
A2
11
O2
U2-D
74HC125
R171
C177
1.0uF
C178
1.0uF
LRCLK_INTF_IN
BCLK_INTF_IN
SDATA_INTF_IN1
SDATA_INTF_IN2
SDATA_INTF_IN3
EXT_MCLK_H1
LRCLK_INTF_IN
BCLK_INTF_ IN
SDATA_IN TF_IN1
SDATA_IN TF_IN2
SDATA_IN TF_IN3
D3V3
1940_LRCLK_OUT0
1940_BCLK_OUT0
1940_SDATA_OUT1
1940_SDATA_OUT2
1940_SDATA_OUT3
EXT_MCLK_H2
1940_LRCLK_OUT0
1940_BCLK_OUT0
1940_SDATA_OUT1
1940_SDATA_OUT2
1940_SDATA_OUT3
D3V3
D3V3
1940_SDATA_OUT7
1940_SDATA_OUT6
1940_SDATA_OUT5
1940_BCLK_OUT1
1940_LRCLK_OUT1
EXT_MCLK_H3
1940_LRCLK_OUT1
1940_BCLK_OUT1
1940_SDATA_OUT5
1940_SDATA_OUT6
1940_SDATA_OUT7
D3V3
D3V3
D3V3
SDATA_IN TF_IN0
SDATA_INTF_IN0
1940_SDATA_OUT0
H2_MCLK
H3_MCLK
1940_SDATA_OUT4
1940_SDATA_OUT4
D3V3
H1_MCLK
Figure 26. Digital Audio I/O Schematics