Datasheet

Preliminary Technical Data EVAL-AD1940AZ
Rev. PrA | Page 17 of 30
AD1939 CODEC
AD1939 DAC Serial Port:
AD1939 DACs are always Slaves
Set AD1940 Serial Output 0 to Master
AD1940 Output Channels 0-7 in I2S Mode
AD1939 ADC Serial Port:
AD1939 ADCs are always Master
AD1940 Input is always Slave
AD1940 Input Channels 0-3 in I2S Mod
e
To use DACs and Digital output header 2 simultaneously,
set AD1940 outputs to slave and external device as LRCLK/BCLK master
53
ADC1LP
54
ADC1LN
55
ADC1RP
56
ADC1RN
57
ADC2LP
58
ADC2LN
59
ADC2RP
60
ADC2RN
22
DLRCLK
21
DBCLK
20
DSDATA1
19
DSDATA2
18
DSDATA3
15
DSDATA4
30
CIN
31
COUT
34
CCLK
35
CLATCH
2
MCLKI/MCLKXI
3
MCLKO/MCLKXO
61
LF
47
FILTR
52
CM
14
PD/RST
36
DAC1LP
37
DAC1LN
38
DAC1RP
39
DAC1RN
40
DAC2LP
41
DAC2LN
42
DAC2RP
43
DAC2RN
6
DAC3LP
7
DAC3LN
8
DAC3RP
9
DAC3RN
29
ALRCLK
28
ABCLK
27
ASDATA1
26
ASDATA2
10
DAC4LP
11
DAC4LN
12
DAC4RP
13
DAC4RN
32
DVDD
17
DVDD
62
AVDD
51
AVDD
45
AVDD
5
AVDD
25
VDRIVE
24
VSENSE
23
VSUPPLY
33
DGND
16
DGND
46
AGND
48
AGND
44
AGND
4
AGND
1
AGND
U3
AD1939
C18 22pF
C19 27pF
Y1
12.288 MHz
R7
100R
C20 C21 C22 C23 C24
C25
AB
1
2
3
J3
C26 5.6nF
C27 390pF
R8 562R
+
C28 10uF
C29 0.10uF
+
C30 100uF
C31 0.10uF
L3
600Z
R9
49R9
+
C32
10uF
+
C33
10uF
1 2 3 4 5 6 7 89
10 11 12 13 14 15 16
R10
56R0
TP30
TP31
TP32
1939_IN1L+
1939_IN1L-
1939_IN1R+
1939_IN1R-
1939_IN2L+
1939_IN2L-
1939_IN2R+
1939_IN2R-
1940_LRCLK_OUT0
1940_BCLK_OUT0
1940_SDATA_OUT0
1940_SDATA_OUT1 1940_SDATA_OUT2 1940_SDATA_OUT3
1939_ASDATA2 1939_ASDATA1
1939_ADC_BCLK
1939_ADC_LRCLK
1939_OUT0+ 1939_OUT0- 1939_OUT1+ 1939_OUT1- 1939_OUT2+ 1939_OUT2- 1939_OUT3+ 1939_OUT3- 1939_OUT4+ 1939_OUT4- 1939_OUT5+ 1939_OUT5- 1939_OUT6+ 1939_OUT6- 1939_OUT7+ 1939_OUT7-
RESET
A3V3
MCLK
1939_MCLKO
A3V3
FILTR
CM
D3V3
D3V3
Figure 21. AD1939 Codec Schematics