Datasheet

UG-045 Evaluation Board User Guide
Rev. 0 | Page 8 of 32
08421-016
DAC and ADC Serial Data (DSDATA/ASDATA) Source Selection and Routing (Switch S4 and Switch S3)
***** Signal sources to the DAC data lines (DSDATA1/2/3/4) fill the columns, column header is the destination ******
S4 Position
DAC Serial Format DAC1 (DSDATA1) DAC2 (DSDATA2) DAC3 (DSDATA3) DAC4 (DSDATA4) Description
0* Stereo SPDIF_RX_8416 SPDIF_RX_8416 SPDIF_RX_8416 SPDIF_RX_8416 SPDIF_RX_8416 stereo data to all eight DAC channels
1 Stereo SPDIF_RX_8416 HDR1_DSDATA2 HDR1_DSDATA3 HDR1_DSDATA4 SPDIF_RX_8416 stereo data to DAC1 only, rest DA
Cs2/3/4 data from HDR1 connector
2 Stereo HDR1_DSDATA1 SPDIF_RX_8416 HDR1_DSDATA3 HDR1_DSDATA4 SPDIF_RX_8416 data to DAC2 only, rest DACs1/3/4 data from HDR1 connector
3 Stereo HDR1_DSDATA1 HDR1_DSDATA2 SPDIF_RX_8416 HDR1_DSDATA4 SPDIF_RX_8416 data to DAC3 only, rest DACs1/2/4 data from HDR1 connector
4 Stereo HDR1_DSDATA1 HDR1_DSDATA2 HDR1_DSDATA3 SPDIF_RX_8416 SPDIF_RX_8416 data to DAC4 only, rest DACs1/2/3 data from HDR1 connector
5 N/
A N/A N/A N/A N/A
6 N/A N/A N/A N/A N/A 7 Stereo/TDM ZERO DATA ZERO DATA ZERO DATA ZERO DATA Source zero da
ta to all eight DAC channels
8 Stereo HDR1_DSDATA1 HDR1_DSDATA1 HDR1_DSDATA1 HDR1_DSDATA1 HDR1 Connector Signal HDR1
_D SDATA1 drives all four DAC pairs
9 Stereo HDR1_DSDATA1 HDR1_DSDATA2 HDR1_DSDATA3 HDR1_DSDATA4 HDR1 Connector Data Lines DSDATA1, DSDATA2... so on drive corresponding DAC data lines
A TDM HDR1_DSDATA1 DAC_TDM_OUT HDR1 Connector Data Lines DSDATA1, DSDATA2... so on drive/receive corresponding DAC data lines in TDM mode B Dual- Line TDM HDR1_DSDATA1 DAC_TDM_OUT HDR1_DSDATA3 DAC_TDM_OUT HDR1 Connector
Data Lines DSDATA1, DSDATA2... so on drive/receive corresponding DAC data lines in TDM mode
C DAC aux mode HDR1_DSDATA1 Aux ADC1 input Aux ADC2 input Aux DAC2 output HDR1 Connector Data Lines DSDATA1, DSDATA2... so on drive/receive corresponding DAC data lines in TDM mode
D E F Stereo/T
DM
TRISTATE TRISTATE TRISTATE TRISTATE
Tristate all DAC data lines, DSDATA1, DSDATA2, DSDATA3, and DSDATA4
***** Column content indicates the direction of the DAC data pins and corresponding HDR1 connector DAC data pins *******
S4 Po
sition
DAC1 (DSDATA1) DAC2 (DSDATA2) DAC3 (DSDATA3) DAC4 (DSDATA4) HDR 1_DSDATA1 HDR 1_DSDATA2 HDR 1_DSDATA3 HDR 1_DSDATA4 SPDIF_Rx Data HDR 1 Data
0* Input Input Input Input N/A N/A N/A N/A Master
1 Input Input Input Input N/A Input Input Input Master
2 Input Input Input Input Input N/A Input Input Master
3 Input Input Input Input Input Input N/A Input Master
4 Input Input Input Input Input Input Input N/A Master
5 6 7 Input Input Input Input Output Output Output Output N/A N/A
8 Input Input Input Input Input Input Input Input Master
9 Input Input Input Input Input Input Input Input Master
A Input Output Input Output Master
B Input Output Input Output Input Output Input Output Master
C Input Input Input Output Input Input Input Output Master
D E F TRISTATE TRISTATE TRISTATE TRISTATE
DIP Switch S3 Position:
Position-6 Position-7 A
DC Serial Format HDR1_ASDATA1 HDR1_ ASDATA2 Description (HDR1 ADC Data Source Selection)
Off* Off* Stereo ASDATA1 ASDATA2 HDR1 Connector ADC Data Lines ASDATA1 and ASDATA2 receive corresponding ADC data stream
Off On Stereo ASDATA2 ASDATA2 HDR1 Connector ADC Data Line ASDATA1 receive ADC2 data line ASDATA2
On Off TDM ASDATA1 ADC TDM input stream HDR1 Connector ADC D ata Line ASDATA1 receive ADC TDM out data stream
On On ADC
Aux (see note)
ASDATA1 ADC TDM input stream HDR1 Connector ADC Data Line ASDATA1 receive ADC TDM out data stream
NOTE: ADC A UX mode overrides the DAC data configuration rotary Switch S2 setting.
DIP Switch S3 Position:
Position-6 Position-7 HDR1_ASDATA1 HDR1_ASDATA2 ADC1 (ASDATA1) ADC2 (ASDATA2) Off* Off* Output Output Output Output
Off On Output Output Output Output
On Off Output Input Output Input
On On Out
put Input Output Input
DIP Switch S3 Position:
Position-8 Off* ADC1 Data Stream ASDATA1 is sourced to the SPDIF_Tx_8406. On ADC2 Data Stream ASDATA2 is sourced to the SPDIF_Tx_8406.
Ro
tary hex Switch S4 selects the AD193x DAC serial data source. The DAC data source can be either SPDIF Receiver CS8416 or can be provided by the Header Connector HDR1. It is important to note that the DAC data source should be in sync with the DAC
serial port clock source( set by DIP Switch S2, Positions [5:6]. DIP Switch S3 routes the ADC s
erial data am
ong AD193x, SPDIF Transmitter CS8406, and Header Connector HDR1 in stereo, TDM, and aux mode.
Figure 16. Settings Chart 2