Datasheet

UG-040 Evaluation Board User Guide
Rev. 0 | Page 24 of 32
// S4 position B,
DAC_DUAL_TDM = ( !MODE14 & MODE13 & !MODE12 & !MODE11);
// S4 position C,
DAC_HDR1_AUX = ( !MODE14 & !MODE13 & MODE12 & MODE11);
// S4 position D,
NA3 = ( !MODE14 & !MODE13 & MODE12 & !MODE11);
// S4 position E,
NA4 = ( !MODE14 & !MODE13 & !MODE12 & MODE11);
// S4 position F,
DAC_DATA_HIZ = ( !MODE14 & !MODE13 & !MODE12 & !MODE11);
// Switch S2
DAC_S/PDIF = (DAC_CLK_SRC1 & DAC_CLK_SRC0);
DAC_HDR1 = (DAC_CLK_SRC1 & !DAC_CLK_SRC0);
DAC_ADC = (!DAC_CLK_SRC1 & DAC_CLK_SRC0);
DAC_DAC = (!DAC_CLK_SRC1 & !DAC_CLK_SRC0);
ADC_S/PDIF = (ADC_CLK_SRC1 & ADC_CLK_SRC0);
ADC_HDR1 = (ADC_CLK_SRC1 & !ADC_CLK_SRC0);
ADC_ADC = (!ADC_CLK_SRC1 & ADC_CLK_SRC0);
ADC_DAC = (!ADC_CLK_SRC1 & !ADC_CLK_SRC0);
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EQUATIONS
S/PDIF_RESET_OUT = S/PDIF_RESET_IN;
// Configuration of the CS8416, changes active on reset, BCLK_8416 and LRCLK_8416 are bi-
directional signals.
SOMS_RX = DAC_S/PDIF;
// SOMS = Serial Output Master/Slave Select
SFSEL1_RX = 0; //DIR_RJ # DIR_RJ16;
// SFSEL1 = Serial Format Select 1
SFSEL0_RX = 1; //DIR_I2S # DIR_DSP;
// SFSEL0 = Serial Format Select 0
RMCKF_RX = !S/PDIF_MCLK_RATE;
// RMCKF =
Receive Master Clock Frequency
// M0_8414 = (0 # !DAC_S/PDIF);
// M1_8414 = 1;
// M2_8414 = 0;